This router has the same hardware as TP-LINK TL-WR841N/ND v11 (same
FCC ID, same TFTP image name...).
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to wr841nv11_tp_recovery.bin
(it's really v11, not v12)
3. Start a tftp server with the image file in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 8b76c6695b9274e3c12fdf80bcad7dc0c7202585)
The TL-WR841N/ND v10 is mostly identical to the v9. Apart from some minor
changes, it contains a newer revision of the QCA9533 SoC and the CPU clock
is significantly higher.
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to wr841nv10_tp_recovery.bin
3. Start a tftp server with the image file in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 4254193c1dc27e18baeb7488ac7fd4ce1afc5723)
This adds support for a popular low-cost 2.4GHz N based AP
Specifications:
SoC: Qualcomm Atheros QCA9533 (650MHz)
RAM: 64MB
Storage: 8 MB SPI NOR
Wireless: 2.4GHz N based built into SoC 2x2
Ethernet: 2x 100/10 Mbps, integrated into SoC
Installation:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
This also applies some minor changes to the common DTSI:
- use &wmac for label-mac-device, as this one is actually set up in
common DTSI
- move ð0 to parent DTSI
- fix several leading spaces, added/removed newlines
Signed-off-by: Andrew Cameron <apcameron@softhome.net>
[DTS style fixes/improvements, updated commit message/title,
backport to 19.07]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The current ethernet MAC address setup of TL-WDR4300 board is different
from the setup of stock firmware:
OpenWrt: lan = label_mac -2, wan = label_mac -2
stock: lan = label_mac, wan = label_mac +1
The full address assignment is as follows:
LAN label
WAN label + 1
5G label
2G label - 1
This patch changes all devices using TL-WDR4300 board:
TL-WDR3600 v1 (checked on device)
TL-WDR4300 v1 (checked on device)
TL-WDR4300 v1 (IL)
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
[rephrase/extend commit title/message, backport]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit a4260eaab7744c8e3f1f7a62a61aab5e3b562342)
The TL-WDR4300 v1 sold in Israel has a different TPLINK_HWID.
Thanks to Josh4300 for testing on device.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit c642a97aa6b51352a718449cd715b92f94af4a5d)
YunCore XD4200 ('XD4200_W6.0' marking on PCB) is Qualcomm/Atheros based
(QCA9563, QCA9886, QCA8334) dual-band, Wave-2 AC1200 ceiling AP with PoE
(802.3at) support. A782 model ('T750_V5.1' marking on PCB) is a smaller
version of the XD4200, with similar specification but lower TX power.
Specification:
- QCA9563 (775 MHz)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 2x 10/100/1000 Mbps Ethernet (QCA8334), with 802.3at PoE support (WAN)
- Wi-Fi 2.4 GHz:
- XD4200: 2T2R (QCA9563), with ext. PA (SKY65174-21) and LNA
- A782: 2T2R (QCA9563), with ext. FEM (SKY85329-11)
- Wi-Fi 5 GHz:
- XD4200: 2T2R (QCA9886), with ext. FEM (SKY85728-11)
- A782: 2T2R (QCA9886), with ext. FEM (SKY85735-11)
- LEDs:
- XD4200: 5x (2x driven by SOC, 1x driven by AC radio, 2x Ethernet)
- A782: 3x (1x RGB, driven by SOC and radio, 2x Ethernet)
- 1x button (reset)
- 1x UART (4-pin, 2.54 mm pitch) header on PCB
- 1x DC jack (12 V)
Flash instructions:
If your device comes with generic QSDK based firmware, you can login
over telnet (login: root, empty password, default IP: 192.168.188.253),
issue first (important!) 'fw_setenv' command and then perform regular
upgrade, using 'sysupgrade -n -F ...' (you can use 'wget' to download
image to the device, SSH server is not available):
fw_setenv bootcmd "bootm 0x9f050000 || bootm 0x9fe80000"
sysupgrade -n -F openwrt-...-yuncore_...-squashfs-sysupgrade.bin
In case your device runs firmware with YunCore custom GUI, you can use
U-Boot recovery mode:
1. Set a static IP 192.168.0.141/24 on PC and start TFTP server with
'tftp' image renamed to 'upgrade.bin'
2. Power the device with reset button pressed and release it after 5-7
seconds, recovery mode should start downloading image from server
(unfortunately, there is no visible indication that recovery got
enabled - in case of problems check TFTP server logs)
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
(backported from commit e5d4c0966736287c7ade29c5ccaf6f1ad841b7db)
TP-Link Archer C60 v2 is a dual-band AC1350 router,
based on Qualcomm/Atheros QCA9561 + QCA9886.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- 7x LED, 2x button
- UART header on PCB
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed IP address 192.168.0.66
2. Download *-factory.bin image and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root
directory
4. Turn off the router
5. Press and hold reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time the firmware should
be transferred from the tftp server
8. Wait ~30 second to complete recovery
Flash instruction (under U-Boot, using UART):
tftp 0x81000000 ...-sysupgrade.bin
erase 0x9f030000 +$filesize
cp.b $fileaddr 0x9f030000 $filesize
reset
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 974d6958a7c6332438ab4cda98e72156c8d944ed)
TP-Link Archer C60v1 is a dual-band AC1350 router,
based on Qualcomm/Atheros QCA9561+QCA9886.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- 7x LED, 2x button
- UART header on PCB
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Flash instruction under U-Boot, using UART:
1. tftp 0x81000000 ...-sysupgrade.bin
2. erase 0x9f020000 +$filesize
3. cp.b $fileaddr 0x9f020000 $filesize
4. reset
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 6d313da6dc5f655d92aa86e2ec42ecfcf763df3d)
The WPS button was mapped to the restart/reset. This patch
changes it to emit the KEY_WPS_BUTTON keycode so pressing
the WPS button does initiate WPS.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
(cherry picked from commit 7a7610c21bb0979f2ae14f3c31012ac9e148b439)
Modify GL-AR300M-Lite and GL-AR300M (NOR):
* Include qca9531_glinet_gl-ar300m.dtsi directly
rather than qca9531_glinet_gl-ar300m-nor.dts
* Remove redundant inclusion of gpio.h and input.h
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
Reviewed-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit f5c7fe2ff0deb20f76b4d65195434e35cbb4e08a)
The Unifi AC-LR has identical hardware to the Unifi AC-Lite.
The antenna setup is different according to the vendor,
which explains the thicker enclosure.
Therefore, it is helpful to know the exact device variant,
instead of having "Ubiquiti UniFi-AC-LITE/LR".
Signed-off-by: Andreas Ziegler <dev@andreas-ziegler.de>
[fix legacy name in commit message; add old boardname to
SUPPORTED_DEVICES]
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit 07c1ddf522dbe6085af664cf03a41f636a70b99c)
Signed-off-by: David Bauer <mail@david-bauer.net>
The device did not appear to be reachable unless the connection were
forced to 100Mb or lower. Revert to previously working pll-data.
Also fix the phy-mode to represent the actual state needed for ethernet
to function.
Reported-by: Moritz Schreiber <moritz@mosos.de>
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[add remark about phy-mode property]
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit ee41b602a2a2ced06c26e6edc160b2a5e9619f0d)
The frequency was filled acording the information from datasheet for
particular chip (Winbond 25Q128BVFG). Unfortunately this led to
coruption and introduced bad blocks on the chip. Reducing the frequency
to commonly used in ath79, made the board more stable and no new bad
blocks were spoted.
Fixes: b3a0c97 ("ath79: add support for jjPlus JA76PF2")
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
(cherry picked from commit c1db564cbc7cad88606f3caedf81d07b0a60931f)
The relationship between GMAC0 and GMAC1 and the kernel devices
eth0 and eth1 was reversed for many ath79 devices by commit 8dde11d521
ath79: dts: drop "simple-mfd" for gmacs in SoC dtsi
The GL-AR300M-Lite is a single-port device, with the "LAN" port of the
GL-AR300M board unpopulated and its sole port now referenced as eth1,
as a result of commit 8dde11d521. The device was unreachable on
first boot or fresh config.
By changing ð1 (GMAC1) to an MFD, GMAC0 is able to associate with
the phy and is known by the kernel as "eth0".
Thanks to Chuanhong Guo for the suggestion of "simple-mfd"
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
(cherry picked from commit b90ea19860853dd538e704e3e4402686c316e43c)
The UniFi AC LED mapping is currently off. The blue/white LED are used
as WiFi indicators, while the vendor firmware does not feature WiFI
LEDs.
Instead, the LEDs are used to indicate the devices status. Align the LED
mapping to match the vendor firmware as good as possible.
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit 18fa749df8bd9fe292c93f60ddd3fb963a78274a)
This fixes the previously incorrect phy-mode for the OCEDO Ursus GMAC0.
See 62abbd587dc9 ("ath79: correct various phy-mode properties")
for more details.
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit 7b137e9df920926dbd92f12450d9955c2759c92b)
The button is labelled reboot/restore in documentation, and has always
been used for that. Naming it WPS has always been wrong.
Signed-off-by: Karl Pálsson <karlp@etactica.com>
[matched author with SoB]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
WiFi2: QCA9558 3T3R
WiFi5: QCA9880 3T3R
BTN: 1x Reset
LED: 1x LED Power (non-controllable)
1x LED Status (internal)
1x LED LAN (controlled by PHY)
1x LED WLAN
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to external-LED header.
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit cb3cd526948af3f69da1af18e035177a0a8f58e3)
In ath79, identifiers tplink_tl-wdr3600 and tplink_tl-wdr4300 have
been used while most other TP-Link devices include the revision.
Although there actually is only one major revision of these
devices, they bear the revision on their bottom (v1.x). TP-Link
also refers to the devices as V1 on its web page.
This patch thus adds -v1 to both so it is more consistent
with other devices and with what you would expect from reading
the on-device sticker and the support pages.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
It was reported in FS#2385, that Carambola2 doesn't currently have
working watchdog so fix it by adding watchdog node.
Ref: FS#2385
Signed-off-by: Petr Štetiar <ynezz@true.cz>
(cherry picked from commit 0893f28e19afbd9d4081f59df10631d6ef02e0d7)
The TP-Link Archer C25 is a low-cost dual-band router.
Specification:
- CPU: Atheros QCA9561 775 MHz
- RAM: 64 MB
- Flash: 8 MB
- Wifi: 3x3 2.4 GHz (integrated), 1x1 5 GHz QCA9887
- NET: 5x 10/100 Mbps Ethernet
Some LEDs are controlled by an additional 74HC595 chip, but not
all of them as e.g. for the C59.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This patch harmonizes the label and alias for art partitions
across ath79. Since lower case seems to be more frequent, use that
consistently.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The info/product-info partition, which frequently contains MAC
adresses, is typically assigned the 'info' alias in DTS, but
then labelled with 'info', 'product-info' or 'config'.
This leads to different aliases if used for setting MAC adresses
in DTS compared to when using e.g. mtd_get_mac_binary. Occationally,
also multiple switch-case entries are used just because of different
labelling.
This patch relabels those partitions in ath79 to consistently use
'info'.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Specifications:
- Atheros AR9331 (400 MHz)
- 64 MB of RAM (DDR2)
- 16 MB of Flash (SPI)
- 1T1R 2.4 Wlan (AR9331)
- 2x 10/100 Mbps Ethernet
- 3x LEDs, 1x gpio button
- 1x USB 2.0, 5V
- UART over usb, 115200n8
Upgrading from ar71xx target:
- Put image into board:
scp openwrt-ath79-generic-8dev_carambola2-squashfs-sysupgrade.bin \
root@192.168.1.1/tmp/
- Run sysupgrade
sysupgrade /tmp/sysupgrade.bin
Upgrading from u-boot:
- Set up tftp server with sysupgrade.bin image
- Go to u-boot (reboot and press ESC when prompted)
- Set TFTP server IP
setenv serverip 192.168.1.254
- Set device ip from same subnet
setenv ipaddr 192.168.1.1
- Copy new firmware to board
tftpboot 0x81000000 sysupgrade.bin
- erase flash
erase 0x9f050000 +${filesize}
- flash firmware
cp.b 0x81000000 0x9f050000 ${filesize}
- Reset board
reset
Signed-off-by: Rytis Zigmantavičius <rytis.z@8devices.com>
[wrapped long line in commit description, whitespace and art address
fix in DTS, keep default lan/wan setup, removed -n in sysupgrade]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
ZBT-WD323 is a dual-LTE router based on AR9344. The detailed
specifications are:
* AR9344 560MHz/450MHz/225MHz (CPU/DDR/AHN).
* 128 MB RAM
* 16MB of flash(SPI-NOR, 22MHz)
* 1x 2.4GHz wifi (Atheros AR9340)
* 3x 10/100Mbos Ethernet (AR8229)
* 1x USB2.0 port
* 2x miniPCIe-slots (USB2.0 only)
* 2x SIM slots (standard size)
* 4x LEDs (1 gpio controlled)
* 1x reset button
* 1x 10 pin terminal block (RS232, RS485, 4x GPIO)
* 2x CP210x UART bridge controllers (used for RS232 and RS485)
* 1x 2 pin 5mm industrial interface (input voltage 12V~36V)
* 1x DC jack
* 1x RTC (PCF8563)
Tested:
- Ethernet switch
- Wifi
- USB port
- MiniPCIe-slots (+ SIM slots)
- Sysupgrade
- Reset button
- RS232
Intallation and recovery:
The board ships with OpenWRT, but sysupgrade does not work as a
different firmware format than what is expected is generated. The
easiest way to install (and recover) the router, is to use the
web-interface provided by the bootloader (Breed).
While the interface is in Chinese, it is easy to use. First, in order to
access the interface, you need to hold down the reset button for around
five seconds. Then, go to 192.168.1.1 in your browser. Click on the
second item in the list on the left to access the recovery page. The
second item on the next page is where you select the firmware. Select
the menu item containing "Atheros SDK" and "16MB" in the dropdown close
to the buttom, and click on the button at the bottom to start
installation/recovery.
Notes:
* RS232 is available on /dev/ttyUSB0 and RS485 on /dev/ttyUSB1
Signed-off-by: Kristian Evensen <kristian.evensen@gmail.com>
[removed unused poll-interval from gpio-keys, i2c-gpio 4.19 compat]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
With a proper probe deferring for ag71xx we don't need to explicitly
probe mdio1 before gmac0.
Drop all "simple-mfd" in SoC dtsi so that gmac orders can be the same
as ar71xx.
This makes eth0/eth1 order the same as those in ar71xx, which means
we don't need a migration script for this anymore and we can merge
incorrectly split gmac/mdio driver back together.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The register size of the QCA955x currently matches the size stated in
the datasheet. However, there are more hidden GMAC registers which are
needed for the SGMII workaround to work.
Signed-off-by: David Bauer <mail@david-bauer.net>
This patch fixes following missing bits:
- add missing 'compatible' property on firmware partition
- set vendor partition 'userconfig' read-only
Fixes: 30dcbc741d ("ath79: add support for EnGenius ECB1750")
Signed-off-by: Sven Friedmann <sf.openwrt@okay.ms>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
SoC: AR9344
RAM: 128MB
Flash: 16MiB Winbond 25Q128BVFG SPI NOR
5GHz WiFi: AR9380 PCIe 3x3:3 802.11n
2.4GHz WiFi: AR9344 (SoC) AHB 2x2:2 802.11n
5x Gigabit ethernet via AR8327N switch (green + amber LEDs)
2x USB 2.0 via GL850G hub
4x front LEDs from SoC GPIO
1x front WPS button from SoC GPIO
1x bottom reset button from SoC GPIO
Known issues:
AR8327N LEDs only have default functionality, not presented in sysfs.
This is a regression from ar71xx.
UART header JP1, 115200 no parity 1 stop
TX
GND
VCC
(N/P)
RX
See https://openwrt.org/toh/wd/n750 for flashing detail.
Procedures unchanged from ar71xx.
Tested sysupgrade + factory flash from WD Emergency Recovery
Signed-off-by: Ryan Mounce <ryan@mounce.com.au>
The GL.iNet AR750S USB and microSD port is currently not working out of
the box. GPIO 7 is used to control the power of the USB port. Add GPIO
7 as a fixed-regulator for the port. Also add &usb1 to DTS to get the
microSD port to work.
Signed-off-by: Alexander Wördekemper <alexwoerde@web.de>
Commit "generic: ar8216: add mib_poll_interval switch attribute" sets
mib-poll-interval as disabled by default (was set to 2s), so it makes
switch LEDs trigger disfunctional on devices which don't have
mib-poll-interval set.
So this patch sets mib-poll-interval to 500ms on devices which have
ar83xx switch connected to mdio0 bus, as the same value was set for
built in switches in 443fc9ac35 ("ath79: use ar8216 for builtin
switch").
Some measurements performed on TP-Link Archer C7-v5:
mib-type=0, mib-poll-interval=500ms (10s pidstat)
Average: %usr %system %guest %wait %CPU CPU Command
Average: 0.00 1.93 0.00 0.00 1.93 - kworker/0:2
iperf3 (30s): 334 Mbits/sec
mib-type=0, mib-poll-interval=2s (10s pidstat)
Average: %usr %system %guest %wait %CPU CPU Command
Average: 0.00 1.14 0.00 0.00 1.14 - kworker/0:2
iperf3 (30s): 334 Mbits/sec
So it seems like we get 4x faster LED refresh rate for additional 0.8%
CPU load.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This patch converts the Range Extender to use the
interrupt-driven gpio-keys driver over the polled variant.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This patch converts the WNDR3700 to use the interrupt-driven
gpio-keys driver over the polled variant.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
All other QCA9563 devices already use this identifier for
the exact SoC. Not that this matters much since as upstream
states in Documentation/devicetree/usage-model.txt:
"First and foremost, the kernel will use data in the DT to
identify the specific machine. In a perfect world, the
specific platform shouldn't matter to the kernel because all
platform details would be described perfectly by the device
tree in a consistent and reliable manner.
[...]
In the majority of cases, the machine identity is irrelevant,
and the kernel will instead select setup code based on the
machine's core CPU or SoC."
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
TP-Link Archer D50 v1 is a dual-band AC1200 router + modem.
The router section is based on Qualcomm/Atheros QCA9531 + QCA9882.
The "DSL" section is based on BCM6318 but it's currently not supported.
Internally eth0 is connected to the Broadcom CPU.
Router section - Specification:
CPU: QCA9531 650/600/200 MHz (CPU/DDR/AHB)
RAM: 64 MB (DDR2)
Flash: 8 MB (SPI NOR)
Wifi 2.4GHz: QCA9531 2T2R
Wifi 5GHz: QCA9982 2T2R
4x 10/100 Mbps Ethernet
8x LED, 3x button
UART header on PCB
Known issues:
DSL not working (eth0) (WIP)
UART connection
---------------
J2 HEADER (Qualcomm CPU)
. TX
. RX
. GND
O VCC
J16 HEADER (Broadcom CPU)
O VCC
. GND
. RX
. TX
The following instructions require a connection to the J2 UART header.
Flash instruction under U-Boot, using UART
------------------------------------------
1. Press any key to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-squashfs-sysupgrade.bin
erase 0x9f020000 +$filesize
cp.b 0x81000000 0x9f020000 $filesize
reset
Initramfs instruction under U-Boot for testing, using UART
----------------------------------------------------------
1. Press any key to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-initramfs-kernel.bin
bootm 0x81000000
Restore the original firmware
-----------------------------
0. Backup every partition using the OpenWrt web interface
1. Download the OEM firmware from the TP-Link website
2. Extract the bin file in a folder (eg. Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin)
3. Remove the U-Boot and the Broadcom image part from the file.
Issue the following command:
dd if="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin" of="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod" skip=257 bs=512 count=15616
4. Double check the .mod file size. It must be 7995392 bytes.
5. Flash it using the OpenWrt web interface. Force the update if needed.
WARNING: Remember to NOT keep settings.
5b. (Alternative to 5.) Flash it using the U-Boot and UART connection.
Issue below commands in the U-Boot:
tftpboot 0x81000000 Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod
erase 0x9f020000 +$filesize
cp.b 0x81000000 0x9f020000 $filesize
reset
Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [removed
default-state = "off", it's already the default, added pcie node,
fixed typo]
SoC: Atheros AR7161-8C1A @ 680 MHz
RAM: 128MB - 2x Etron Technology EM6AB160TSA-5G
NOR: 16MB - 1x MXIC MX25L12845EMI-10G (SPI-NOR)
WI1: Atheros AR9223-AC1A 802.11bgn
WI2: Atheros AR9220-AC1A 802.11an
ETH: Atheros AR8021-BL1E + PoE
LED: Dual-Color Power/Status, Ethernet, WLAN2G and WLAN5G
BTN: 1 x Reset
I2C: AT97SC4303s TPM (needs driver!)
CON: RS232-level 8P8C/RJ45 Console Port - 9600 Baud
Factory installation:
- Needs a u-boot replacement. See Wiki for
information on how to do a in-circut flash with
a SPI-Flasher like a CH314A or flashrom. Wiki page
can be found at https://openwrt.org/toh/aruba/aruba_ap-105
- Be careful when dis- and reassembling the device to
not squish any of the antenna cables in the process!
- Be sure to make a full 16 MiB backup of your device
before flashing the new u-boot! This is needed if you
ever have interest in reverting back to stock firmware.
Not working:
- TPM (needs a driver)
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
Specifications:
- QCA9563 at 775 MHz
- 64 MB RAM Zentel A3R12E40CBF-8E
- 16 MB flash Winbond W25Q128FVSG
- 3 (non-detachable) Antennas / 450 Mbit
- 1x/4x WAN/LAN Gbps Ethernet (QCA8337)
- reset and Wi-Fi buttons
TP-Link TL-WR1043N v5 appears to be identical to the TL-WR1043ND v4,
except that the USB port has been removed and there is no longer a
removable antenna option. It also has different partitioning scheme.
The software is more in line with the Archer series in that it uses a
nested bootloader scheme.
(This has been adapted from the OpenWrt Wiki page)
<https://openwrt.org/toh/tp-link/tl-wr1043nd>
Installation on HW rev.5:
Factory firmware can be installed via the WEB interface.
Alternatively, it is also possible to use a TFTP server
for recovery purposes:
- Rename OpenWRT or original firmware to WR1043v5_tp_recovery.bin
- Set static IP of your PC to *192.168.0.66*
- Router will obtain IP 192.168.0.86 for a few seconds while
loading, when reset button pressed at power On.
And finally, there's always u-boot access through the UART.
For information visit the wiki.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
[reworked commit message]
Specification:
- Qualcomm Atheros SoC QCA9558
- 720/600/200 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 1x 10/100/1000 Mbps Ethernet
- 3T3R 2.4 GHz (QCA9558 WMAC)
- 3T3R 5.8 Ghz (QCA9880-BR4A, Senao PCE4553AH)
https://fccid.io/A8J-ECB1750
Tested and working:
- lan, wireless, leds, sysupgrade (tftp)
Flash instructions:
1.) tftp recovery
- use a 1GbE switch or direct attached 1GbE link
- setup client ip address 192.168.1.10 and start tftpd
- save "openwrt-ath79-generic-engenius_ecb1750-initramfs-kernel.bin" as "ap.bin" in tfpd root directory
- plugin powercord and hold reset button 10secs.. "ap.bin" will be downloaded and executed
- afterwards login via ssh and do a sysuprade
2.) oem webinterface factory install (not tested)
Use normal webinterface upgrade page und select "openwrt-ath79-generic-engenius_ecb1750-squashfs-factory.bin".
3.) oem webinterface command injection
OEM Firmware already running OpenWrt (Attitude Adjustment 12.09).
Use OEM webinterface and command injection. See wiki for details.
https://openwrt.org/toh/engenius/engenius_ecb1750_1
Signed-off-by: sven friedmann <sf.openwrt@okay.ms>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
[use interrupt-driven "gpio-keys" binding]
These dts itself are incomplete (e.g. missing mtd partitions) and its
deivce support is never added to ath79 target.
Drop these unused dts for now.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
In commit e9652e1696 ("ath79: fix pinmux for ar933x devices") I've
wrongly changed desired register value to 0xf8 although it should've
been set to 0x0.
0xf8 value sets bits 3-7 (ETH_SWITCH_LEDx_EN) to 1 which actually
enables ethernet switch LEDs, so 0x0 is correct value in order to use
the pins as GPIO.
Fixes: e9652e1696 ("ath79: fix pinmux for ar933x devices")
Reported-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Simply dumped content of this regs in ar71xx and wrote them to DTS, as a
result port 6 on the switch will appear disconnected as on Archer C7v4.
[AS: testing and PORT6_STATUS fix]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Properly disable the SoC's internal Switch LEDs on the pinmux.
Devices that previously called ath79_gpio_function_disable for
the switch LEDs, just need to reference switch_led_pins in the
pinctrl-0 property of the gpio-leds node.
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
[changed desired pinctrl register value from 0x1f to proper 0xf8]
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[renamed pinmux name to switch_led_disable_pins to make purpose more clear]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This devices have LEDs connected to the SoC's GPIOs, so it makes no
sense to fiddle with ar8327 LED regs.
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Add some read-only properties to protect partitions from
accidental changes.
Also fixed two whitespaces error on the way.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This corrects the PLL value for 10 Mbit/s links on the OCEDO Raccoon.
Prior to this patch, 10 Mbit/s links would not transmit data.
It is worth mentioning that the vendor firmware used the same PLL
settings and 10Mbit/s was also not working there.
All other link-modes are working correctly without any packet loss.
Signed-off-by: David Bauer <mail@david-bauer.net>
Reverting this commit as I've missed the fact, that the button is
already present in the included DTSI file.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This adds support for the TP-Link WR842N v3 which is already supported on ar71xx
target (0b45bec22c).
Specification:
* SoC: QCA9533 ver 2 rev 0
* 16 MB Flash (gd25q128)
* 64 MB RAM
* 1 WAN 10/100 MBit/s (blue connector)
* 4 LAN 10/100 MBit/s (AR8229; 4 ports; yellow connectors)
* Atheros AR9531 (2,4GHz, two fixed antennas)
* USB
* Reset / WPS button
* WiFi button (rf kill)
* 8 green leds; 1 red/green led
* serial console (115200 8N1, according to the OpenWrt-wiki some soldering is needed)
Installation:
* flash via vendor WebUI (the filename must not exceed certain length)
* sysupgrade from installed OpenWrt (also ar71xx)
Thanks to Holger Drefs for providing the hardware
Tested-by: @kofec (github)
Signed-off-by: Sven Roederer <devel-sven@geroedel.de>
This is sold as a dual-band 802.11ac range extender. It has a sliding
switch for Extender mode or Access Point mode, a WPS button, a recessed
Reset button, a hard-power button, and a multitude of LED's, some
multiplexed via an NXP 74AHC164D chip. The internal serial header pinout is
Vcc, Tx, Rx, GND, with GND closest to the corner of the board. You may
connect at 115200 bps, 8 data bits, no parity, 1 stop bit.
Specification:
- System-On-Chip: QCA9558
- CPU/Speed: 720 MHz
- Flash-Chip: Winbond 25Q128FVSG
- Flash size: 16 MiB
- RAM: 128 MiB
- Wireless No1: QCA9558 on-chip 2.4GHz 802.11bgn, 3x3
- Wireless No2: QCA99x0 chip 5GHz 802.11an+ac, 4x4
- PHY: Atheros AR8035-A
Installation:
If you can get to the stock firmware's firmware upgrade option, just feed
it the factory.img and boot as usual. As an alternative, TFTP the
factory.img to the bootloader.
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[whitespace fix in DTS and reorder of make variables]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Adrian Schmutzler