ar71xx:add support for E558 v2

Qxwlan E558 v2 is based on Qualcomm QCA9558 + AR8327.

Specification:

 - 720/600/200 MHz (CPU/DDR/AHB)
 - 128 MB of RAM (DDR2)
 - 8/16 MB of FLASH (SPI NOR)
 - 2T2R 2.4 GHz (QCA9558)
 - 3x 10/100/1000 Mbps Ethernet (one port with PoE support)
 - 4x miniPCIe slot (USB 2.0 bus only)
 - 1x microSIM slot
 - 5x LED (4 driven by GPIO)
 - 1x button (reset)
 - 1x 3-pos switch
 - 1x DC jack for main power input (9-48 V)
 - UART (JP5) and LEDs (J8) headers on PCB

Flash instruction (using U-Boot CLI and tftp server):

 - Configure PC with static IP 192.168.1.10 and tftp server.
 - Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
   server directory.
 - Connect PC with one of RJ45 ports, power up the board and press
   "enter" key to access U-Boot CLI.
 - Use the following command to update the device to OpenWrt: "run lfw".

Flash instruction (using U-Boot web-based recovery):

 - Configure PC with static IP 192.168.1.xxx(2-254)/24.
 - Connect PC with one of RJ45 ports, press the reset button, power up
   the board and keep button pressed for around 6-7 seconds, until LEDs
   start flashing.
 - Open your browser and enter 192.168.1.1, select "sysupgrade" image
   and click the upgrade button.

Signed-off-by: 张鹏 <sd20@qxwlan.com>
master
张鹏 6 years ago committed by John Crispin
parent 0aaa650755
commit b74f63f81d
  1. 3
      target/linux/ar71xx/base-files/etc/board.d/01_leds
  2. 5
      target/linux/ar71xx/base-files/etc/board.d/02_network
  3. 1
      target/linux/ar71xx/base-files/etc/diag.sh
  4. 3
      target/linux/ar71xx/base-files/lib/ar71xx.sh
  5. 1
      target/linux/ar71xx/base-files/lib/upgrade/platform.sh
  6. 1
      target/linux/ar71xx/config-4.9
  7. 11
      target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
  8. 1
      target/linux/ar71xx/files/arch/mips/ath79/Makefile
  9. 170
      target/linux/ar71xx/files/arch/mips/ath79/mach-e558-v2.c
  10. 1
      target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
  11. 1
      target/linux/ar71xx/generic/config-default
  12. 19
      target/linux/ar71xx/image/generic.mk

@ -372,6 +372,9 @@ e1700ac-v2)
ucidef_set_led_usbdev "usb" "USB" "$board:green:usb" "1-1"
ucidef_set_led_wlan "wlan2g" "WLAN2G" "$board:green:wlan2g" "phy1tpt"
;;
e558-v2)
ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan" "phy0tpt"
;;
esr900)
ucidef_set_led_wlan "wlan2g" "WLAN 2.4 GHz" "engenius:blue:wlan-2g" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN 5 GHz" "engenius:blue:wlan-5g" "phy1tpt"

@ -390,6 +390,11 @@ ar71xx_setup_interfaces()
ucidef_add_switch "switch0" \
"0@eth0" "2:lan" "3:wan"
;;
e558-v2)
ucidef_set_interfaces_lan_wan "eth1.1" "eth0.2"
ucidef_add_switch "switch0" \
"0@eth1" "4:lan" "5:lan" "6@eth0" "3:wan"
;;
ebr-2310-c1)
ucidef_set_interfaces_lan_wan "eth0.1" "eth1"
ucidef_add_switch "switch0" \

@ -24,6 +24,7 @@ get_status_led() {
antminer-s3|\
antminer-r1|\
e1700ac-v2|\
e558-v2|\
e600gac-v2|\
eap120|\
minibox-v1|\

@ -675,6 +675,9 @@ ar71xx_board_detect() {
*"E2100L")
name="e2100l"
;;
*"E558 v2")
name="e558-v2"
;;
*"E600G v2")
name="e600g-v2"
;;

@ -250,6 +250,7 @@ platform_check_image() {
dr531|\
dragino2|\
e1700ac-v2|\
e558-v2|\
e600g-v2|\
e600gac-v2|\
ebr-2310-c1|\

@ -101,6 +101,7 @@ CONFIG_ATH79=y
# CONFIG_ATH79_MACH_DRAGINO2 is not set
# CONFIG_ATH79_MACH_E1700AC_V2 is not set
# CONFIG_ATH79_MACH_E2100L is not set
# CONFIG_ATH79_MACH_E558_V2 is not set
# CONFIG_ATH79_MACH_E600G_V2 is not set
# CONFIG_ATH79_MACH_EAP120 is not set
# CONFIG_ATH79_MACH_EAP300V2 is not set

@ -711,6 +711,17 @@ config ATH79_MACH_E2100L
select ATH79_DEV_WMAC
select ATH79_NVRAM
config ATH79_MACH_E558_V2
bool "Qxwlan E558 v2 support"
select SOC_QCA955X
select ATH79_DEV_AP9X_PCI if PCI
select ATH79_DEV_ETH
select ATH79_DEV_GPIO_BUTTONS
select ATH79_DEV_LEDS_GPIO
select ATH79_DEV_M25P80
select ATH79_DEV_USB
select ATH79_DEV_WMAC
config ATH79_MACH_E600G_V2
bool "Qxwlan E600G/E600GAC v2 support"
select SOC_QCA953X

@ -112,6 +112,7 @@ obj-$(CONFIG_ATH79_MACH_DR344) += mach-dr344.o
obj-$(CONFIG_ATH79_MACH_DR531) += mach-dr531.o
obj-$(CONFIG_ATH79_MACH_DRAGINO2) += mach-dragino2.o
obj-$(CONFIG_ATH79_MACH_E1700AC_V2) += mach-e1700ac-v2.o
obj-$(CONFIG_ATH79_MACH_E558_V2) += mach-e558-v2.o
obj-$(CONFIG_ATH79_MACH_E600G_V2) += mach-e600g-v2.o
obj-$(CONFIG_ATH79_MACH_EAP120) += mach-eap120.o
obj-$(CONFIG_ATH79_MACH_EAP300V2) += mach-eap300v2.o

@ -0,0 +1,170 @@
/*
* Qxwlan E558 v2 board support
*
* Copyright (C) 2017 Peng Zhang <sd20@qxwlan.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/phy.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#define E558_V2_GPIO_LED_WLAN 13
#define E558_V2_GPIO_LED_SYSTEM 14
#define E558_V2_GPIO_LED_QSS 15
#define E558_V2_GPIO_BTN_RESET 16
#define E558_V2_KEYS_POLL_INTERVAL 20 /* msecs */
#define E558_V2_KEYS_DEBOUNCE_INTERVAL (3 * E558_V2_KEYS_POLL_INTERVAL)
static struct gpio_led e558_v2_leds_gpio[] __initdata = {
{
.name = "e558-v2:green:qss",
.gpio = E558_V2_GPIO_LED_QSS,
.active_low = 1,
},
{
.name = "e558-v2:green:system",
.gpio = E558_V2_GPIO_LED_SYSTEM,
.active_low = 1,
},
{
.name = "e558-v2:green:wlan",
.gpio = E558_V2_GPIO_LED_WLAN,
.active_low = 1,
},
};
static struct gpio_keys_button e558_v2_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = E558_V2_KEYS_DEBOUNCE_INTERVAL,
.gpio = E558_V2_GPIO_BTN_RESET,
.active_low = 1,
},
};
/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
static struct ar8327_pad_cfg e558_v2_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */
static struct ar8327_pad_cfg e558_v2_ar8327_pad6_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static const struct ar8327_led_info e558_v2_leds_qca8334[] = {
AR8327_LED_INFO(PHY2_0, HW, "e558-v2:green:wan"),
AR8327_LED_INFO(PHY3_0, HW, "e558-v2:green:lan1"),
AR8327_LED_INFO(PHY4_0, HW, "e558-v2:green:lan2"),
};
static struct ar8327_led_cfg e558_v2_ar8327_led_cfg = {
.led_ctrl0 = 0xc737c737,
.led_ctrl1 = 0x00000000,
.led_ctrl2 = 0x00000000,
.led_ctrl3 = 0x0030c300,
.open_drain = false,
};
static struct ar8327_platform_data e558_v2_ar8327_data = {
.pad0_cfg = &e558_v2_ar8327_pad0_cfg,
.pad6_cfg = &e558_v2_ar8327_pad6_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.port6_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.led_cfg = &e558_v2_ar8327_led_cfg,
.leds = e558_v2_leds_qca8334,
.num_leds = ARRAY_SIZE(e558_v2_leds_qca8334),
};
static struct mdio_board_info e558_v2_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &e558_v2_ar8327_data,
},
};
static void __init e558_v2_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f050400);
u8 *art = (u8 *) KSEG1ADDR(0x1f061000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(e558_v2_leds_gpio),
e558_v2_leds_gpio);
ath79_register_gpio_keys_polled(-1, E558_V2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(e558_v2_gpio_keys),
e558_v2_gpio_keys);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(e558_v2_mdio0_info,
ARRAY_SIZE(e558_v2_mdio0_info));
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
/* GMAC0 is connected to the RMGII interface */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x56000000;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_register_eth(0);
/* GMAC1 is connected to the SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_eth(1);
ath79_register_pci();
ath79_register_usb();
ath79_register_wmac(art, NULL);
}
MIPS_MACHINE(ATH79_MACH_E558_V2, "E558-V2", "Qxwlan E558 v2",
e558_v2_setup);

@ -105,6 +105,7 @@ enum ath79_mach_type {
ATH79_MACH_DR531, /* Wallys DR531 */
ATH79_MACH_DRAGINO2, /* Dragino Version 2 */
ATH79_MACH_E1700AC_V2, /* Qxwlan E1700AC v2 */
ATH79_MACH_E558_V2, /* Qxwlan E558 v2 */
ATH79_MACH_E600G_V2, /* Qxwlan E600G v2 */
ATH79_MACH_E600GAC_V2, /* Qxwlan E600GAC v2 */
ATH79_MACH_EAP120, /* TP-LINK EAP120 */

@ -73,6 +73,7 @@ CONFIG_ATH79_MACH_DR531=y
CONFIG_ATH79_MACH_DRAGINO2=y
CONFIG_ATH79_MACH_E1700AC_V2=y
CONFIG_ATH79_MACH_E2100L=y
CONFIG_ATH79_MACH_E558_V2=y
CONFIG_ATH79_MACH_E600G_V2=y
CONFIG_ATH79_MACH_EAP120=y
CONFIG_ATH79_MACH_EAP300V2=y

@ -326,6 +326,25 @@ define Device/e1700ac-v2-8M
endef
TARGET_DEVICES += e1700ac-v2-8M
define Device/e558-v2-16M
DEVICE_TITLE := Qxwlan E558 v2 (16MB flash)
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 -swconfig
BOARDNAME := E558-V2
SUPPORTED_DEVICES := e558-v2
IMAGE_SIZE := 15936k
MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env),64k(pri-data)ro,64k(art),-(firmware)
IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) |\
append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE)
endef
TARGET_DEVICES += e558-v2-16M
define Device/e558-v2-8M
$(Device/e558-v2-16M)
DEVICE_TITLE := Qxwlan E558 v2 (8MB flash)
IMAGE_SIZE := 7744k
endef
TARGET_DEVICES += e558-v2-8M
define Device/e600g-v2-16M
DEVICE_TITLE := Qxwlan E600G v2 (16MB flash)
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 -swconfig

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