Qxwlan E558 v2 is based on Qualcomm QCA9558 + AR8327. Specification: - 720/600/200 MHz (CPU/DDR/AHB) - 128 MB of RAM (DDR2) - 8/16 MB of FLASH (SPI NOR) - 2T2R 2.4 GHz (QCA9558) - 3x 10/100/1000 Mbps Ethernet (one port with PoE support) - 4x miniPCIe slot (USB 2.0 bus only) - 1x microSIM slot - 5x LED (4 driven by GPIO) - 1x button (reset) - 1x 3-pos switch - 1x DC jack for main power input (9-48 V) - UART (JP5) and LEDs (J8) headers on PCB Flash instruction (using U-Boot CLI and tftp server): - Configure PC with static IP 192.168.1.10 and tftp server. - Rename "sysupgrade" filename to "firmware.bin" and place it in tftp server directory. - Connect PC with one of RJ45 ports, power up the board and press "enter" key to access U-Boot CLI. - Use the following command to update the device to OpenWrt: "run lfw". Flash instruction (using U-Boot web-based recovery): - Configure PC with static IP 192.168.1.xxx(2-254)/24. - Connect PC with one of RJ45 ports, press the reset button, power up the board and keep button pressed for around 6-7 seconds, until LEDs start flashing. - Open your browser and enter 192.168.1.1, select "sysupgrade" image and click the upgrade button. Signed-off-by: 张鹏 <sd20@qxwlan.com>master
张鹏
6 years ago
committed by
John Crispin
parent
0aaa650755
commit
b74f63f81d
@ -0,0 +1,170 @@ |
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/*
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* Qxwlan E558 v2 board support |
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* |
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* Copyright (C) 2017 Peng Zhang <sd20@qxwlan.com> |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 as published |
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* by the Free Software Foundation. |
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*/ |
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#include <linux/phy.h> |
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#include <linux/gpio.h> |
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#include <linux/platform_device.h> |
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#include <linux/ath9k_platform.h> |
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#include <linux/ar8216_platform.h> |
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#include <asm/mach-ath79/ar71xx_regs.h> |
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#include "common.h" |
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#include "dev-ap9x-pci.h" |
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#include "dev-eth.h" |
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#include "dev-gpio-buttons.h" |
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#include "dev-leds-gpio.h" |
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#include "dev-m25p80.h" |
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#include "dev-spi.h" |
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#include "dev-usb.h" |
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#include "dev-wmac.h" |
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#include "machtypes.h" |
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#include "pci.h" |
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#define E558_V2_GPIO_LED_WLAN 13 |
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#define E558_V2_GPIO_LED_SYSTEM 14 |
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#define E558_V2_GPIO_LED_QSS 15 |
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#define E558_V2_GPIO_BTN_RESET 16 |
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#define E558_V2_KEYS_POLL_INTERVAL 20 /* msecs */ |
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#define E558_V2_KEYS_DEBOUNCE_INTERVAL (3 * E558_V2_KEYS_POLL_INTERVAL) |
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static struct gpio_led e558_v2_leds_gpio[] __initdata = { |
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{ |
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.name = "e558-v2:green:qss", |
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.gpio = E558_V2_GPIO_LED_QSS, |
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.active_low = 1, |
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}, |
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{ |
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.name = "e558-v2:green:system", |
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.gpio = E558_V2_GPIO_LED_SYSTEM, |
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.active_low = 1, |
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}, |
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{ |
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.name = "e558-v2:green:wlan", |
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.gpio = E558_V2_GPIO_LED_WLAN, |
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.active_low = 1, |
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}, |
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}; |
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static struct gpio_keys_button e558_v2_gpio_keys[] __initdata = { |
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{ |
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.desc = "reset", |
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.type = EV_KEY, |
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.code = KEY_RESTART, |
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.debounce_interval = E558_V2_KEYS_DEBOUNCE_INTERVAL, |
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.gpio = E558_V2_GPIO_BTN_RESET, |
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.active_low = 1, |
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}, |
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}; |
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/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */ |
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static struct ar8327_pad_cfg e558_v2_ar8327_pad0_cfg = { |
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.mode = AR8327_PAD_MAC_SGMII, |
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.sgmii_delay_en = true, |
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}; |
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/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */ |
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static struct ar8327_pad_cfg e558_v2_ar8327_pad6_cfg = { |
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.mode = AR8327_PAD_MAC_RGMII, |
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.txclk_delay_en = true, |
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.rxclk_delay_en = true, |
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL1, |
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, |
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}; |
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static const struct ar8327_led_info e558_v2_leds_qca8334[] = { |
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AR8327_LED_INFO(PHY2_0, HW, "e558-v2:green:wan"), |
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AR8327_LED_INFO(PHY3_0, HW, "e558-v2:green:lan1"), |
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AR8327_LED_INFO(PHY4_0, HW, "e558-v2:green:lan2"), |
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}; |
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static struct ar8327_led_cfg e558_v2_ar8327_led_cfg = { |
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.led_ctrl0 = 0xc737c737, |
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.led_ctrl1 = 0x00000000, |
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.led_ctrl2 = 0x00000000, |
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.led_ctrl3 = 0x0030c300, |
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.open_drain = false, |
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}; |
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static struct ar8327_platform_data e558_v2_ar8327_data = { |
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.pad0_cfg = &e558_v2_ar8327_pad0_cfg, |
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.pad6_cfg = &e558_v2_ar8327_pad6_cfg, |
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.port0_cfg = { |
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.force_link = 1, |
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.speed = AR8327_PORT_SPEED_1000, |
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.duplex = 1, |
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.txpause = 1, |
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.rxpause = 1, |
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}, |
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.port6_cfg = { |
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.force_link = 1, |
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.speed = AR8327_PORT_SPEED_1000, |
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.duplex = 1, |
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.txpause = 1, |
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.rxpause = 1, |
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}, |
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.led_cfg = &e558_v2_ar8327_led_cfg, |
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.leds = e558_v2_leds_qca8334, |
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.num_leds = ARRAY_SIZE(e558_v2_leds_qca8334), |
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}; |
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static struct mdio_board_info e558_v2_mdio0_info[] = { |
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{ |
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.bus_id = "ag71xx-mdio.0", |
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.phy_addr = 0, |
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.platform_data = &e558_v2_ar8327_data, |
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}, |
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}; |
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static void __init e558_v2_setup(void) |
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{ |
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u8 *mac = (u8 *) KSEG1ADDR(0x1f050400); |
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u8 *art = (u8 *) KSEG1ADDR(0x1f061000); |
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ath79_register_m25p80(NULL); |
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ath79_register_leds_gpio(-1, ARRAY_SIZE(e558_v2_leds_gpio), |
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e558_v2_leds_gpio); |
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ath79_register_gpio_keys_polled(-1, E558_V2_KEYS_POLL_INTERVAL, |
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ARRAY_SIZE(e558_v2_gpio_keys), |
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e558_v2_gpio_keys); |
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ath79_register_mdio(0, 0x0); |
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mdiobus_register_board_info(e558_v2_mdio0_info, |
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ARRAY_SIZE(e558_v2_mdio0_info)); |
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ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); |
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/* GMAC0 is connected to the RMGII interface */ |
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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ath79_eth0_data.phy_mask = BIT(0); |
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; |
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ath79_eth0_pll_data.pll_1000 = 0x56000000; |
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ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); |
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ath79_register_eth(0); |
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/* GMAC1 is connected to the SGMII interface */ |
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; |
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ath79_eth1_data.speed = SPEED_1000; |
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ath79_eth1_data.duplex = DUPLEX_FULL; |
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ath79_eth1_pll_data.pll_1000 = 0x03000101; |
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ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); |
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ath79_register_eth(1); |
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ath79_register_pci(); |
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ath79_register_usb(); |
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ath79_register_wmac(art, NULL); |
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} |
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MIPS_MACHINE(ATH79_MACH_E558_V2, "E558-V2", "Qxwlan E558 v2", |
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e558_v2_setup); |
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