ralink: only apply ephy1 fixup if the phy is present

this broke e1700 lan2 as the fixup was applied to the phy inside the mt7530.

Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 43200
master
John Crispin 10 years ago
parent 78b6222851
commit 0cc0ba2b3a
  1. 5
      target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620a.c

@ -72,6 +72,8 @@
#define GSW_REG_IMR 0x7008
#define GSW_REG_ISR 0x700c
#define GSW_REG_GPC1 0x7014
#define GSW_PHY1_DISABLE BIT(25)
#define SYSC_REG_CFG1 0x14
@ -414,6 +416,8 @@ static void gsw_hw_init(struct mt7620_gsw *gsw)
rt_sysc_w32(rt_sysc_r32(SYSC_REG_CFG1) | BIT(8), SYSC_REG_CFG1);
gsw_w32(gsw, gsw_r32(gsw, GSW_REG_CKGCR) & ~(0x3 << 4), GSW_REG_CKGCR);
/* EPHY1 fixup - only run if the ephy is enabled */
if (gsw_r32(gsw, GSW_REG_GPC1) & GSW_PHY1_DISABLE == GSW_PHY1_DISABLE) {
/*correct PHY setting L3.0 BGA*/
_mt7620_mii_write(gsw, 1, 31, 0x4000); //global, page 4
@ -451,6 +455,7 @@ static void gsw_hw_init(struct mt7620_gsw *gsw)
}
_mt7620_mii_write(gsw, 1, 31, 0x1000); //global, page 1
_mt7620_mii_write(gsw, 1, 17, 0xe7f8);
}
_mt7620_mii_write(gsw, 1, 31, 0x8000); //local, page 0
_mt7620_mii_write(gsw, 0, 30, 0xa000);

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