This patch adds support for the zyxel nbg460n/550n/550nh routers.
Currently this only works if a second stage bootloader is also flashed,
as the used switch needs extra initialization.
Signed-off-by: Michael Kurz <michi.kurz@googlemail.com>
SVN-Revision: 20990
Let swconfig provide the cpu port index in its help page. This is
needed as e.g. Atheros switches have their cpu port at port 0, not
port 5.
This could allow e.g. luci to get a rough overview of the layout of
the switch.
Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com>
SVN-Revision: 20939
- on ar724x, rx buffers can be aligned with an offset of 2, which keeps the ip header aligned
- alignment offset is only added if the ar8216 workaround is not active and the phy driver does not advertise its own packet alignment
- ar71xx and ar91xx can not handle rx alignment offsets, however taking a hit on unaligned exceptions seems to have less overhead than re-aligning the data for large packets
- use memmove to re-align small packets, if necessary
tested on ar9132, ar7240 and ar7242 based devices without ar8216 headers
SVN-Revision: 20892
Swconfig needs to make sure that requested vlans/ports actually exist,
else it might read or modify memory not belonging to itself.
This patch adds a quick range check in swconfig's kernel part to
prevent accidential or intentional memory modification.
Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com>
SVN-Revision: 20811
This patch brings up the net5501 platform.
Note that the x86/ target included support for all x86/ class
processors. That's not technically correct. This should be constrained
only to the "generic" subtarget. Every x86-class target that isn't
generic should be able to select only the optimizations/capabilities
applicable to that architectural variant.
It's also assumed that all x86 processors have keyboard & mouse ports,
ISA, DMI, ACPI... the embedded ones typically don't. Again, moving
that to the generic subtarget.
Fortunately, this was a fairly benign tweak.
The net5501 board includes the following logic:
Geode/LX processor
CS5535 super-I/O chip
PC87360 sensor chip
Via Rhine Ethernet controllers
Via Sata controllers
USB, LEDS, I2C
Signed-off-by: Philip Prindeville <philipp_subx@redfish-solutions.com>
SVN-Revision: 20794
Gabor Juhos