ppc40x: move perwe fixup into a separate function

Cc: backfire@openwrt.org

SVN-Revision: 20929
master
Gabor Juhos 15 years ago
parent 1847940688
commit 15d344df50
  1. 18
      target/linux/ppc40x/patches/004-magicbox.patch
  2. 18
      target/linux/ppc40x/patches/005-openrb.patch

@ -1,6 +1,6 @@
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-magicbox.c
@@ -0,0 +1,90 @@
@@ -0,0 +1,96 @@
+/*
+ * Old U-boot compatibility for Magicbox boards
+ *
@ -26,16 +26,22 @@
+
+static bd_t bd;
+
+static void fixup_cf_card(void)
+static void fixup_perwe(void)
+{
+#define DCRN_CPC0_PCI_BASE 0xf9
+#define CF_CS0_BASE 0xff100000
+#define CF_CS1_BASE 0xff200000
+
+ /* Turn on PerWE instead of PCIsomething */
+ /* Turn on PerWE instead of PCIINT */
+ mtdcr(DCRN_CPC0_PCI_BASE,
+ mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
+
+#undef DCRN_CPC0_PCI_BASE
+}
+
+static void fixup_cf_card(void)
+{
+#define CF_CS0_BASE 0xff100000
+#define CF_CS1_BASE 0xff200000
+
+ /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
@ -48,7 +54,6 @@
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
+
+#undef DCRN_CPC0_PCI_BASE
+#undef CF_CS0_BASE
+#undef CF_CS1_BASE
+}
@ -76,6 +81,7 @@
+ devp = finddevice("/plb/ebc/cf_card@ff100000");
+ del_node(devp);
+ } else {
+ fixup_perwe();
+ fixup_cf_card();
+ }
+

@ -1,6 +1,6 @@
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-openrb.c
@@ -0,0 +1,71 @@
@@ -0,0 +1,77 @@
+/*
+ * Old U-boot compatibility for OpenRB boards
+ *
@ -26,16 +26,22 @@
+
+static bd_t bd;
+
+static void fixup_cf_card(void)
+static void fixup_perwe(void)
+{
+#define DCRN_CPC0_PCI_BASE 0xf9
+#define CF_CS0_BASE 0xff100000
+#define CF_CS1_BASE 0xff200000
+
+ /* Turn on PerWE instead of PCIsomething */
+ /* Turn on PerWE instead of PCIINT */
+ mtdcr(DCRN_CPC0_PCI_BASE,
+ mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
+
+#undef DCRN_CPC0_PCI_BASE
+}
+
+static void fixup_cf_card(void)
+{
+#define CF_CS0_BASE 0xff100000
+#define CF_CS1_BASE 0xff200000
+
+ /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
@ -48,7 +54,6 @@
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
+
+#undef DCRN_CPC0_PCI_BASE
+#undef CF_CS0_BASE
+#undef CF_CS1_BASE
+}
@ -58,6 +63,7 @@
+ ibm405ep_fixup_clocks(bd.bi_procfreq / 8);
+ ibm4xx_sdram_fixup_memsize();
+
+ fixup_perwe();
+ fixup_cf_card();
+
+ dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);

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