With kernel 3.14 dts target p1010rdb was renamed to p1010rdb-pa.
To maintain compatibility define p1010rdb-pa as new standard and
copy p1010rdb.dts to p1010rdb-pa.dts under 3.10.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43371
If there is no board support in the kernel, it does not make sense to
build images for devices. So drop any images for board ids for which
there are nc corresponding board_info structs in the kernel.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 43364
Patch reverts 43332 which seems to cause issues with VLAN functionality.
Add a specific check to check whether ANEG is still enabled and re-enable
it if necessary. Disable generic phy soft reset for kernel >=3.16.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43356
This target can be emulated using ARM's Foundation_V8 simulator
software or qemu-system-aarch64 using the command-line described in the
README file.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 43355
Since we updated autoconf in r42855 we also need to enforce its use
while building eglibc to allow it to build successfully.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 43352
Move compatible strings from board structs into separate table. This
allows for several board compatibles to match to the same board in case
e.g. only the flash size / partitions differ.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 43341
We should make sure that also for ar8216 hw gets initialized.
For ar8216 hw_init is a dummy currently. The hw_init used for ar8236
should be generic enough to be usable with ar8216 too.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43334
Move the PHY fixup call to the PHY init loop.
Use ar8xxx_has_gige in the PHY init instead of passing the gigE
capability via function parameter.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43333
Kernel 3.14 introduced a switch reset in phy_init_hw in drivers/net/phy
causing BMCR_ANENABLE to get cleared.
Due to the fact that ar8xxx_phy_config_aneg does nothing for
PHY 0 autonegatiation support remains disabled.
This can cause ports to operate at 10MBit/half-duplex only.
Fix this by calling genphy_config_aneg for PHY 0 too as
genphy_config_aneg sets BMCR_ANENABLE if it's not yet set.
Fixes: ticket 17800
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43332
PHY init code in the switch-specific hw_init functions is mainly
identical. Factor it out into a generic ar8xxx_phy_init function.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43331
Move phy fixup code from the chip-specific hw_init functions into a
fixup_phys callback.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43330
Currently there is a fixed 1000ms wait time after the switch was reset.
Most if not all switches need much less time to perform a reset.
Therefore replace the fixed wait time with polling for BMCR_RESET to
be cleared.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43329
All supported switches have 5 PHYs. Currently partially 5 is hardcoded
and partially switch-specific constants exist.
Replace them with a global constant.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43328
On out-of-tree modules depending on other out-of-tree modules from a
different tree, module dependencies are not filled properly.
This change helps with adding those dependencies in the AutoLoad call
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43323
John Crispin