ramips: clean up the mt7621 nand flash driver hacks, add support for the xiaomi mir3g flash chip

Signed-off-by: Felix Fietkau <nbd@nbd.name>
master
Felix Fietkau 7 years ago
parent e7f24f35b3
commit f95a4aa565
  1. 13
      target/linux/ramips/patches-4.14/0039-mtd-add-mt7621-nand-support.patch
  2. 42
      target/linux/ramips/patches-4.14/0040-nand-hack-restore-write_page.patch
  3. 61
      target/linux/ramips/patches-4.14/0040-nand-hack.patch

@ -1299,7 +1299,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ +
--- /dev/null --- /dev/null
+++ b/drivers/mtd/nand/mtk_nand2.c +++ b/drivers/mtd/nand/mtk_nand2.c
@@ -0,0 +1,2363 @@ @@ -0,0 +1,2365 @@
+/****************************************************************************** +/******************************************************************************
+* mtk_nand2.c - MTK NAND Flash Device Driver +* mtk_nand2.c - MTK NAND Flash Device Driver
+ * + *
@ -2748,7 +2748,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+{ +{
+ struct nand_chip *chip = (struct nand_chip *)mtd->priv; + struct nand_chip *chip = (struct nand_chip *)mtd->priv;
+ +
+ chip->erase(mtd, page); + chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
+ chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
+ +
+ return chip->waitfunc(mtd, chip); + return chip->waitfunc(mtd, chip);
+} +}
@ -3431,7 +3432,6 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ nand_chip->write_page = mtk_nand_write_page; + nand_chip->write_page = mtk_nand_write_page;
+ nand_chip->ecc.write_oob = mtk_nand_write_oob; + nand_chip->ecc.write_oob = mtk_nand_write_oob;
+ nand_chip->block_markbad = mtk_nand_block_markbad; // need to add nand_get_device()/nand_release_device(). + nand_chip->block_markbad = mtk_nand_block_markbad; // need to add nand_get_device()/nand_release_device().
+ nand_chip->erase_mtk = mtk_nand_erase;
+ nand_chip->read_page = mtk_nand_read_page; + nand_chip->read_page = mtk_nand_read_page;
+ nand_chip->ecc.read_oob = mtk_nand_read_oob; + nand_chip->ecc.read_oob = mtk_nand_read_oob;
+ nand_chip->block_bad = mtk_nand_block_bad; + nand_chip->block_bad = mtk_nand_block_bad;
@ -3562,6 +3562,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ goto out; + goto out;
+ } + }
+ +
+ nand_chip->erase = mtk_nand_erase;
+
+ g_page_size = mtd->writesize; + g_page_size = mtd->writesize;
+ platform_set_drvdata(pdev, host); + platform_set_drvdata(pdev, host);
+ if (hw->nfi_bus_width == 16) { + if (hw->nfi_bus_width == 16) {
@ -4303,7 +4305,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+#endif /* __NAND_DEF_H__ */ +#endif /* __NAND_DEF_H__ */
--- /dev/null --- /dev/null
+++ b/drivers/mtd/nand/nand_device_list.h +++ b/drivers/mtd/nand/nand_device_list.h
@@ -0,0 +1,56 @@ @@ -0,0 +1,59 @@
+/* Copyright Statement: +/* Copyright Statement:
+ * + *
+ * This software/firmware and related documentation ("MediaTek Software") are + * This software/firmware and related documentation ("MediaTek Software") are
@ -4350,6 +4352,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ {0xADBC, 0x905554, 5, 16, 512, 128, 2048, 64, 0x10801011, "H9DA4GH4JJAMC", 0}, + {0xADBC, 0x905554, 5, 16, 512, 128, 2048, 64, 0x10801011, "H9DA4GH4JJAMC", 0},
+ {0x01F1, 0x801D01, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "S34ML01G100TF", 0}, + {0x01F1, 0x801D01, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "S34ML01G100TF", 0},
+ {0x92F1, 0x8095FF, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "F59L1G81A", 0}, + {0x92F1, 0x8095FF, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "F59L1G81A", 0},
+ {0xC8D1, 0x809540, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "F59L1G81MA", 0},
+ {0xC8DA, 0x909544, 5, 8, 256, 128, 2048, 64, 0x30C77fff, "F59L2G81A", 0},
+ {0xC8DC, 0x909554, 5, 8, 512, 128, 2048, 64, 0x30C77fff, "F59L4G81A", 0},
+ {0xECD3, 0x519558, 5, 8, 1024, 128, 2048, 64, 0x44333, "K9K8G8000", 0}, + {0xECD3, 0x519558, 5, 8, 1024, 128, 2048, 64, 0x44333, "K9K8G8000", 0},
+ {0xC2F1, 0x801DC2, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "MX30LF1G08AA", 0}, + {0xC2F1, 0x801DC2, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "MX30LF1G08AA", 0},
+ {0x98D3, 0x902676, 5, 8, 1024, 256, 4096, 224, 0x00C25332, "TC58NVG3S0F", 0}, + {0x98D3, 0x902676, 5, 8, 1024, 256, 4096, 224, 0x00C25332, "TC58NVG3S0F", 0},

@ -1,42 +0,0 @@
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -885,6 +885,9 @@ struct nand_chip {
int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
int (*erase)(struct mtd_info *mtd, int page);
int (*scan_bbt)(struct mtd_info *mtd);
+ int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
+ uint32_t offset, int data_len, const uint8_t *buf,
+ int oob_required, int page, int raw);
int (*onfi_set_features)(struct mtd_info *mtd, struct nand_chip *chip,
int feature_addr, uint8_t *subfeature_para);
int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2761,9 +2761,14 @@ static int nand_do_write_ops(struct mtd_
memset(chip->oob_poi, 0xff, mtd->oobsize);
}
- ret = nand_write_page(mtd, chip, column, bytes, wbuf,
- oob_required, page,
- (ops->mode == MTD_OPS_RAW));
+// if (chip->write_page)
+ ret = chip->write_page(mtd, chip, column, bytes, wbuf,
+ oob_required, page,
+ (ops->mode == MTD_OPS_RAW));
+// else
+// ret = nand_write_page(mtd, chip, column, bytes, wbuf,
+// oob_required, page,
+// (ops->mode == MTD_OPS_RAW));
if (ret)
break;
@@ -4719,6 +4724,9 @@ int nand_scan_tail(struct mtd_info *mtd)
}
}
+// if (!chip->write_page)
+// chip->write_page = nand_write_page;
+
/*
* Check ECC mode, default to software if 3byte/512byte hardware ECC is
* selected and we have 256 byte pagesize fallback to software ECC

@ -18,47 +18,42 @@
if (ret < 0) { if (ret < 0) {
if (use_bufpoi) if (use_bufpoi)
/* Invalidate page cache */ /* Invalidate page cache */
@@ -3084,8 +3088,11 @@ int nand_erase_nand(struct mtd_info *mtd @@ -2761,9 +2765,14 @@ static int nand_do_write_ops(struct mtd_
(page + pages_per_block)) memset(chip->oob_poi, 0xff, mtd->oobsize);
chip->pagebuf = -1; }
- ret = nand_write_page(mtd, chip, column, bytes, wbuf,
- oob_required, page,
- (ops->mode == MTD_OPS_RAW));
+ if (chip->write_page)
+ ret = chip->write_page(mtd, chip, column, bytes, wbuf,
+ oob_required, page,
+ (ops->mode == MTD_OPS_RAW));
+ else
+ ret = nand_write_page(mtd, chip, column, bytes, wbuf,
+ oob_required, page,
+ (ops->mode == MTD_OPS_RAW));
if (ret)
break;
+#ifdef CONFIG_MTK_MTD_NAND
+ status = chip->erase_mtk(mtd, page & chip->pagemask);
+#else
status = chip->erase(mtd, page & chip->pagemask);
-
+#endif
/* See if block erase succeeded */
if (status & NAND_STATUS_FAIL) {
pr_debug("%s: failed erase, page 0x%08x\n",
@@ -4215,6 +4222,7 @@ int nand_scan_ident(struct mtd_info *mtd
* cmdfunc() both expect cmd_ctrl() to be populated,
* so we need to check that that's the case
*/
+ printk("%s:%s[%d]%p %p %p\n", __FILE__, __func__, __LINE__, chip->cmdfunc, chip->select_chip, chip->cmd_ctrl);
pr_err("chip.cmd_ctrl() callback is not provided");
return -EINVAL;
}
--- a/drivers/mtd/nand/nand_device_list.h
+++ b/drivers/mtd/nand/nand_device_list.h
@@ -44,6 +44,8 @@ static const flashdev_info gen_FlashTabl
{0xADBC, 0x905554, 5, 16, 512, 128, 2048, 64, 0x10801011, "H9DA4GH4JJAMC", 0},
{0x01F1, 0x801D01, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "S34ML01G100TF", 0},
{0x92F1, 0x8095FF, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "F59L1G81A", 0},
+ {0xC8DA, 0x909544, 5, 8, 256, 128, 2048, 64, 0x30C77fff, "F59L2G81A", 0},
+ {0xC8DC, 0x909554, 5, 8, 512, 128, 2048, 64, 0x30C77fff, "F59L4G81A", 0},
{0xECD3, 0x519558, 5, 8, 1024, 128, 2048, 64, 0x44333, "K9K8G8000", 0},
{0xC2F1, 0x801DC2, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "MX30LF1G08AA", 0},
{0x98D3, 0x902676, 5, 8, 1024, 256, 4096, 224, 0x00C25332, "TC58NVG3S0F", 0},
--- a/include/linux/mtd/rawnand.h --- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h
@@ -896,6 +896,10 @@ struct nand_chip { @@ -885,6 +885,9 @@ struct nand_chip {
int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
int (*erase)(struct mtd_info *mtd, int page);
int (*scan_bbt)(struct mtd_info *mtd);
+ int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
+ uint32_t offset, int data_len, const uint8_t *buf,
+ int oob_required, int page, int raw);
int (*onfi_set_features)(struct mtd_info *mtd, struct nand_chip *chip,
int feature_addr, uint8_t *subfeature_para);
int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,
@@ -893,6 +896,9 @@ struct nand_chip {
int (*setup_data_interface)(struct mtd_info *mtd, int chipnr, int (*setup_data_interface)(struct mtd_info *mtd, int chipnr,
const struct nand_data_interface *conf); const struct nand_data_interface *conf);
+#ifdef CONFIG_MTK_MTD_NAND +#ifdef CONFIG_MTK_MTD_NAND
+ int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip, u8 *buf, int page); + int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip, u8 *buf, int page);
+ int (*erase_mtk)(struct mtd_info *mtd, int page);
+#endif /* CONFIG_MTK_MTD_NAND */ +#endif /* CONFIG_MTK_MTD_NAND */
int chip_delay; int chip_delay;

Loading…
Cancel
Save