The serial was working before, but not when doing copy&pasting longer
commands in a short time.
Fixes: a4def18f29
("uboot-omap: Update to u-boot v2017.01")
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
master
parent
f93f29bccc
commit
f6e6eadc99
@ -0,0 +1,309 @@ |
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From 17fa032671f7981628fe16b30399638842a4b1bb Mon Sep 17 00:00:00 2001
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From: Heiko Schocher <hs@denx.de>
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Date: Wed, 18 Jan 2017 08:05:49 +0100
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Subject: [PATCH] serial, ns16550: bugfix: ns16550 fifo not enabled
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commit: 65f83802b7a5b "serial: 16550: Add getfcr accessor"
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breaks u-boot commandline working with long commands
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sending to the board.
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Since the above patch, you have to setup the fcr register.
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For board/archs which enable OF_PLATDATA, the new field
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fcr in struct ns16550_platdata is not filled with a
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default value ...
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This leads in not setting up the uarts fifo, which ends
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in problems, when you send long commands to u-boots
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commandline.
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Detected this issue with automated tbot tests on am335x
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based shc board.
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The error does not popup, if you type commands. You need
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to copy&paste a long command to u-boots commandshell
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(or send a long command with tbot)
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Possible boards/plattforms with problems:
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./arch/arm/cpu/arm926ejs/lpc32xx/devices.c
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./arch/arm/mach-tegra/board.c
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./board/overo/overo.c
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./board/quipos/cairo/cairo.c
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./board/logicpd/omap3som/omap3logic.c
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./board/logicpd/zoom1/zoom1.c
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./board/timll/devkit8000/devkit8000.c
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./board/lg/sniper/sniper.c
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./board/ti/beagle/beagle.c
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./drivers/serial/serial_rockchip.c
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
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Tested-by: Adam Ford <aford173@gmail.com>
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Reviewed-by: Tom Rini <trini@konsulko.com>
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---
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arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 12 ++++++++----
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arch/arm/mach-omap2/am33xx/board.c | 18 ++++++++++++------
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arch/arm/mach-tegra/board.c | 1 +
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board/isee/igep00x0/igep00x0.c | 3 ++-
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board/lg/sniper/sniper.c | 3 ++-
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board/logicpd/omap3som/omap3logic.c | 3 ++-
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board/logicpd/zoom1/zoom1.c | 3 ++-
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board/overo/overo.c | 3 ++-
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board/quipos/cairo/cairo.c | 3 ++-
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board/ti/beagle/beagle.c | 3 ++-
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board/timll/devkit8000/devkit8000.c | 3 ++-
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drivers/serial/ns16550.c | 9 +++------
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drivers/serial/serial_rockchip.c | 1 +
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include/ns16550.h | 5 +++++
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14 files changed, 46 insertions(+), 24 deletions(-)
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diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
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index 399b07c5420a..f744398ca7ad 100644
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--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
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+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
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@@ -45,10 +45,14 @@ void lpc32xx_uart_init(unsigned int uart_id)
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#if !CONFIG_IS_ENABLED(OF_CONTROL)
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static const struct ns16550_platdata lpc32xx_uart[] = {
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- { .base = UART3_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
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- { .base = UART4_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
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- { .base = UART5_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
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- { .base = UART6_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
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+ { .base = UART3_BASE, .reg_shift = 2,
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+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
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+ { .base = UART4_BASE, .reg_shift = 2,
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+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
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+ { .base = UART5_BASE, .reg_shift = 2,
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+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
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+ { .base = UART6_BASE, .reg_shift = 2,
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+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
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};
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#if defined(CONFIG_LPC32XX_HSUART)
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diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
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index 73824df18fa7..190310fd0079 100644
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--- a/arch/arm/mach-omap2/am33xx/board.c
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+++ b/arch/arm/mach-omap2/am33xx/board.c
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@@ -40,14 +40,20 @@ DECLARE_GLOBAL_DATA_PTR;
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#if !CONFIG_IS_ENABLED(OF_CONTROL)
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static const struct ns16550_platdata am33xx_serial[] = {
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- { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
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+ { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2,
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+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
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# ifdef CONFIG_SYS_NS16550_COM2
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- { .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
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+ { .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2,
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+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
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# ifdef CONFIG_SYS_NS16550_COM3
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- { .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
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- { .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
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- { .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
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- { .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
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+ { .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2,
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+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
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+ { .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2,
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+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
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+ { .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2,
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+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
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+ { .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2,
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+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
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# endif
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# endif
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};
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diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
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index 3d1d26d13d13..b3a041b539af 100644
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--- a/arch/arm/mach-tegra/board.c
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+++ b/arch/arm/mach-tegra/board.c
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@@ -219,6 +219,7 @@ static struct ns16550_platdata ns16550_com1_pdata = {
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.base = CONFIG_SYS_NS16550_COM1,
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.reg_shift = 2,
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.clock = CONFIG_SYS_NS16550_CLK,
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+ .fcr = UART_FCR_DEFVAL,
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};
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U_BOOT_DEVICE(ns16550_com1) = {
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diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
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index ae7959b1eb6e..5a3498f570a6 100644
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--- a/board/isee/igep00x0/igep00x0.c
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+++ b/board/isee/igep00x0/igep00x0.c
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@@ -32,7 +32,8 @@ DECLARE_GLOBAL_DATA_PTR;
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static const struct ns16550_platdata igep_serial = {
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.base = OMAP34XX_UART3,
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.reg_shift = 2,
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- .clock = V_NS16550_CLK
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+ .clock = V_NS16550_CLK,
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+ .fcr = UART_FCR_DEFVAL,
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};
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U_BOOT_DEVICE(igep_uart) = {
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diff --git a/board/lg/sniper/sniper.c b/board/lg/sniper/sniper.c
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index 0662449c3875..b2b8f8861f11 100644
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--- a/board/lg/sniper/sniper.c
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+++ b/board/lg/sniper/sniper.c
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@@ -31,7 +31,8 @@ const omap3_sysinfo sysinfo = {
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static const struct ns16550_platdata serial_omap_platdata = {
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.base = OMAP34XX_UART3,
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.reg_shift = 2,
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- .clock = V_NS16550_CLK
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+ .clock = V_NS16550_CLK,
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+ .fcr = UART_FCR_DEFVAL,
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};
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U_BOOT_DEVICE(sniper_serial) = {
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diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
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index 21b3fdcf49cf..b2fcc28f8b4b 100644
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--- a/board/logicpd/omap3som/omap3logic.c
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+++ b/board/logicpd/omap3som/omap3logic.c
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@@ -49,7 +49,8 @@ DECLARE_GLOBAL_DATA_PTR;
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static const struct ns16550_platdata omap3logic_serial = {
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.base = OMAP34XX_UART1,
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.reg_shift = 2,
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- .clock = V_NS16550_CLK
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+ .clock = V_NS16550_CLK,
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+ .fcr = UART_FCR_DEFVAL,
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};
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U_BOOT_DEVICE(omap3logic_uart) = {
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diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c
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index 2821ee22674f..0fad23af62f6 100644
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--- a/board/logicpd/zoom1/zoom1.c
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+++ b/board/logicpd/zoom1/zoom1.c
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@@ -47,7 +47,8 @@ static const u32 gpmc_lab_enet[] = {
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static const struct ns16550_platdata zoom1_serial = {
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.base = OMAP34XX_UART3,
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.reg_shift = 2,
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- .clock = V_NS16550_CLK
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+ .clock = V_NS16550_CLK,
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+ .fcr = UART_FCR_DEFVAL,
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};
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U_BOOT_DEVICE(zoom1_uart) = {
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diff --git a/board/overo/overo.c b/board/overo/overo.c
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index 40f13e5876cc..5e447262bcfd 100644
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--- a/board/overo/overo.c
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+++ b/board/overo/overo.c
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@@ -70,7 +70,8 @@ static struct {
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static const struct ns16550_platdata overo_serial = {
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.base = OMAP34XX_UART3,
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.reg_shift = 2,
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- .clock = V_NS16550_CLK
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+ .clock = V_NS16550_CLK,
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+ .fcr = UART_FCR_DEFVAL,
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};
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U_BOOT_DEVICE(overo_uart) = {
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diff --git a/board/quipos/cairo/cairo.c b/board/quipos/cairo/cairo.c
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index 77e4482906f0..793aa9023150 100644
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--- a/board/quipos/cairo/cairo.c
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+++ b/board/quipos/cairo/cairo.c
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@@ -93,7 +93,8 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
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static const struct ns16550_platdata cairo_serial = {
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.base = OMAP34XX_UART2,
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.reg_shift = 2,
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- .clock = V_NS16550_CLK
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+ .clock = V_NS16550_CLK,
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+ .fcr = UART_FCR_DEFVAL,
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};
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U_BOOT_DEVICE(cairo_uart) = {
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diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
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index cfdab3e34253..23c79333a223 100644
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--- a/board/ti/beagle/beagle.c
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+++ b/board/ti/beagle/beagle.c
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@@ -75,7 +75,8 @@ static struct {
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static const struct ns16550_platdata beagle_serial = {
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.base = OMAP34XX_UART3,
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.reg_shift = 2,
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- .clock = V_NS16550_CLK
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+ .clock = V_NS16550_CLK,
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+ .fcr = UART_FCR_DEFVAL,
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};
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U_BOOT_DEVICE(beagle_uart) = {
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diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
|
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index f785dbe6d732..b2f060b2ddbf 100644
|
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--- a/board/timll/devkit8000/devkit8000.c
|
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+++ b/board/timll/devkit8000/devkit8000.c
|
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@@ -48,7 +48,8 @@ static u32 gpmc_net_config[GPMC_MAX_REG] = {
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static const struct ns16550_platdata devkit8000_serial = {
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.base = OMAP34XX_UART3,
|
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.reg_shift = 2,
|
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- .clock = V_NS16550_CLK
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+ .clock = V_NS16550_CLK,
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+ .fcr = UART_FCR_DEFVAL,
|
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};
|
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|
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U_BOOT_DEVICE(devkit8000_uart) = {
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diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
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index 9b423a591d8a..2df4a1f04fe5 100644
|
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--- a/drivers/serial/ns16550.c
|
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+++ b/drivers/serial/ns16550.c
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@@ -20,9 +20,6 @@ DECLARE_GLOBAL_DATA_PTR;
|
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#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
|
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#define UART_MCRVAL (UART_MCR_DTR | \
|
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UART_MCR_RTS) /* RTS/DTR */
|
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-#define UART_FCRVAL (UART_FCR_FIFO_EN | \
|
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- UART_FCR_RXSR | \
|
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- UART_FCR_TXSR) /* Clear & enable FIFOs */
|
||||
|
||||
#ifndef CONFIG_DM_SERIAL
|
||||
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
|
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@@ -138,7 +135,7 @@ static u32 ns16550_getfcr(NS16550_t port)
|
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#else
|
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static u32 ns16550_getfcr(NS16550_t port)
|
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{
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- return UART_FCRVAL;
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+ return UART_FCR_DEFVAL;
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}
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#endif
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|
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@@ -275,7 +272,7 @@ static inline void _debug_uart_init(void)
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CONFIG_BAUDRATE);
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serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
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serial_dout(&com_port->mcr, UART_MCRVAL);
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- serial_dout(&com_port->fcr, UART_FCRVAL);
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+ serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
|
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|
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serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
|
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serial_dout(&com_port->dll, baud_divisor & 0xff);
|
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@@ -440,7 +437,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
|
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return -EINVAL;
|
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}
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|
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- plat->fcr = UART_FCRVAL;
|
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+ plat->fcr = UART_FCR_DEFVAL;
|
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if (port_type == PORT_JZ4780)
|
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plat->fcr |= UART_FCR_UME;
|
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|
||||
diff --git a/drivers/serial/serial_rockchip.c b/drivers/serial/serial_rockchip.c
|
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index 6bac95a414ce..c06afc58f7ea 100644
|
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--- a/drivers/serial/serial_rockchip.c
|
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+++ b/drivers/serial/serial_rockchip.c
|
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@@ -27,6 +27,7 @@ static int rockchip_serial_probe(struct udevice *dev)
|
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plat->plat.base = plat->dtplat.reg[0];
|
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plat->plat.reg_shift = plat->dtplat.reg_shift;
|
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plat->plat.clock = plat->dtplat.clock_frequency;
|
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+ plat->plat.fcr = UART_FCR_DEFVAL;
|
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dev->platdata = &plat->plat;
|
||||
|
||||
return ns16550_serial_probe(dev);
|
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diff --git a/include/ns16550.h b/include/ns16550.h
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index 7c9703683109..5fcbcd2e74e3 100644
|
||||
--- a/include/ns16550.h
|
||||
+++ b/include/ns16550.h
|
||||
@@ -121,6 +121,11 @@ typedef struct NS16550 *NS16550_t;
|
||||
/* Ingenic JZ47xx specific UART-enable bit. */
|
||||
#define UART_FCR_UME 0x10
|
||||
|
||||
+/* Clear & enable FIFOs */
|
||||
+#define UART_FCR_DEFVAL (UART_FCR_FIFO_EN | \
|
||||
+ UART_FCR_RXSR | \
|
||||
+ UART_FCR_TXSR)
|
||||
+
|
||||
/*
|
||||
* These are the definitions for the Modem Control Register
|
||||
*/
|
||||
--
|
||||
2.17.0
|
||||
|
Loading…
Reference in new issue