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@ -820,20 +820,20 @@ ar8316_hw_init(struct ar8216_priv *priv) |
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priv->write(priv, AR8316_REG_POSTRIP, newval); |
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priv->write(priv, AR8316_REG_POSTRIP, newval); |
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/* Initialize the ports */ |
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if (priv->port4_phy && |
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bus = priv->mii_bus; |
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for (i = 0; i < 5; i++) { |
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if ((i == 4) && priv->port4_phy && |
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priv->phy->interface == PHY_INTERFACE_MODE_RGMII) { |
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priv->phy->interface == PHY_INTERFACE_MODE_RGMII) { |
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/* work around for phy4 rgmii mode */ |
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/* work around for phy4 rgmii mode */ |
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ar8216_phy_dbg_write(priv, i, 0x12, 0x480c); |
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ar8216_phy_dbg_write(priv, 4, 0x12, 0x480c); |
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/* rx delay */ |
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/* rx delay */ |
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ar8216_phy_dbg_write(priv, i, 0x0, 0x824e); |
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ar8216_phy_dbg_write(priv, 4, 0x0, 0x824e); |
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/* tx delay */ |
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/* tx delay */ |
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ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47); |
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ar8216_phy_dbg_write(priv, 4, 0x5, 0x3d47); |
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msleep(1000); |
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msleep(1000); |
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} |
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} |
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/* Initialize the ports */ |
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bus = priv->mii_bus; |
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for (i = 0; i < 5; i++) { |
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/* initialize the port itself */ |
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/* initialize the port itself */ |
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mdiobus_write(bus, i, MII_ADVERTISE, |
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mdiobus_write(bus, i, MII_ADVERTISE, |
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ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
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ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
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