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update gpio patches

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SVN-Revision: 33462
master
Hauke Mehrtens 12 years ago
parent e566454513
commit eeb3ad1860
3 changed files with 124 additions and 149 deletions
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  1. 1
      target/linux/brcm47xx/config-3.3
  2. 244
      target/linux/brcm47xx/patches-3.3/501-bcma-add-gpio-driver.patch
  3. 28
      target/linux/brcm47xx/patches-3.3/502-bcm47xx-rewrite-gpio-handling.patch

1
target/linux/brcm47xx/config-3.3
Unescape View File

@ -16,7 +16,6 @@ CONFIG_BCMA=y
CONFIG_BCMA_BLOCKIO=y
CONFIG_BCMA_DEBUG=y
CONFIG_BCMA_DRIVER_GMAC_CMN=y
CONFIG_BCMA_DRIVER_GPIO=y
CONFIG_BCMA_DRIVER_MIPS=y
CONFIG_BCMA_DRIVER_PCI_HOSTMODE=y
CONFIG_BCMA_HOST_PCI=y

244
target/linux/brcm47xx/patches-3.3/501-bcma-add-gpio-driver.patch
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@ -1,168 +1,140 @@
--- a/drivers/bcma/Kconfig
+++ b/drivers/bcma/Kconfig
@@ -39,6 +39,11 @@ config BCMA_HOST_SOC
depends on BCMA_DRIVER_MIPS
select USB_HCD_BCMA if USB_EHCI_HCD || USB_OHCI_HCD
--- a/drivers/bcma/driver_chipcommon.c
+++ b/drivers/bcma/driver_chipcommon.c
@@ -57,6 +57,8 @@ void bcma_core_chipcommon_init(struct bc
(leddc_off << BCMA_CC_GPIOTIMER_OFFTIME_SHIFT)));
}
+config BCMA_DRIVER_GPIO
+ bool
+ depends on BCMA_DRIVER_MIPS
+ default y
+ spin_lock_init(&cc->gpio_lock);
+
config BCMA_SFLASH
bool
depends on BCMA_DRIVER_MIPS
--- a/drivers/bcma/Makefile
+++ b/drivers/bcma/Makefile
@@ -6,6 +6,7 @@ bcma-y += driver_pci.o
bcma-$(CONFIG_BCMA_DRIVER_PCI_HOSTMODE) += driver_pci_host.o
bcma-$(CONFIG_BCMA_DRIVER_MIPS) += driver_mips.o
bcma-$(CONFIG_BCMA_DRIVER_GMAC_CMN) += driver_gmac_cmn.o
+bcma-$(CONFIG_BCMA_DRIVER_GPIO) += driver_gpio.o
bcma-$(CONFIG_BCMA_HOST_PCI) += host_pci.o
bcma-$(CONFIG_BCMA_HOST_SOC) += host_soc.o
obj-$(CONFIG_BCMA) += bcma.o
--- /dev/null
+++ b/drivers/bcma/driver_gpio.c
@@ -0,0 +1,90 @@
+/*
+ * Broadcom specific AMBA
+ * GPIO driver for SoCs
+ *
+ * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+
+#include <linux/export.h>
+#include <linux/bcma/bcma.h>
+#include <linux/bcma/bcma_driver_gpio.h>
+
+u32 bcma_gpio_in(struct bcma_bus *bus, u32 mask)
+{
cc->setup_done = true;
}
@@ -79,34 +81,81 @@ u32 bcma_chipco_irq_status(struct bcma_d
u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask)
{
- return bcma_cc_read32(cc, BCMA_CC_GPIOIN) & mask;
+ unsigned long flags;
+ u32 res = 0;
+ u32 res;
+
+ spin_lock_irqsave(&bus->gpio_lock, flags);
+ res = bcma_chipco_gpio_in(&bus->drv_cc, mask);
+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
+ spin_lock_irqsave(&cc->gpio_lock, flags);
+ res = bcma_cc_read32(cc, BCMA_CC_GPIOIN) & mask;
+ spin_unlock_irqrestore(&cc->gpio_lock, flags);
+
+ return res;
+}
+EXPORT_SYMBOL(bcma_gpio_in);
+
+u32 bcma_gpio_out(struct bcma_bus *bus, u32 mask, u32 value)
+{
}
+EXPORT_SYMBOL_GPL(bcma_chipco_gpio_in);
u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value)
{
- return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUT, mask, value);
+ unsigned long flags;
+ u32 res = 0;
+ u32 res;
+
+ spin_lock_irqsave(&bus->gpio_lock, flags);
+ res = bcma_chipco_gpio_out(&bus->drv_cc, mask, value);
+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
+ spin_lock_irqsave(&cc->gpio_lock, flags);
+ res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUT, mask, value);
+ spin_unlock_irqrestore(&cc->gpio_lock, flags);
+
+ return res;
+}
+EXPORT_SYMBOL(bcma_gpio_out);
+
+u32 bcma_gpio_outen(struct bcma_bus *bus, u32 mask, u32 value)
+{
}
+EXPORT_SYMBOL_GPL(bcma_chipco_gpio_out);
u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value)
{
- return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUTEN, mask, value);
+ unsigned long flags;
+ u32 res = 0;
+ u32 res;
+
+ spin_lock_irqsave(&bus->gpio_lock, flags);
+ res = bcma_chipco_gpio_outen(&bus->drv_cc, mask, value);
+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
+ spin_lock_irqsave(&cc->gpio_lock, flags);
+ res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUTEN, mask, value);
+ spin_unlock_irqrestore(&cc->gpio_lock, flags);
+
+ return res;
+}
+EXPORT_SYMBOL(bcma_gpio_outen);
+
+u32 bcma_gpio_control(struct bcma_bus *bus, u32 mask, u32 value)
+{
}
+EXPORT_SYMBOL_GPL(bcma_chipco_gpio_outen);
u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value)
{
- return bcma_cc_write32_masked(cc, BCMA_CC_GPIOCTL, mask, value);
+ unsigned long flags;
+ u32 res = 0;
+ u32 res;
+
+ spin_lock_irqsave(&bus->gpio_lock, flags);
+ res = bcma_chipco_gpio_control(&bus->drv_cc, mask, value);
+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
+ spin_lock_irqsave(&cc->gpio_lock, flags);
+ res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOCTL, mask, value);
+ spin_unlock_irqrestore(&cc->gpio_lock, flags);
+
+ return res;
+}
+EXPORT_SYMBOL(bcma_gpio_control);
+
+u32 bcma_gpio_intmask(struct bcma_bus *bus, u32 mask, u32 value)
+{
}
EXPORT_SYMBOL_GPL(bcma_chipco_gpio_control);
u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value)
{
- return bcma_cc_write32_masked(cc, BCMA_CC_GPIOIRQ, mask, value);
+ unsigned long flags;
+ u32 res = 0;
+ u32 res;
+
+ spin_lock_irqsave(&bus->gpio_lock, flags);
+ res = bcma_chipco_gpio_intmask(&bus->drv_cc, mask, value);
+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
+ spin_lock_irqsave(&cc->gpio_lock, flags);
+ res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOIRQ, mask, value);
+ spin_unlock_irqrestore(&cc->gpio_lock, flags);
+
+ return res;
+}
+EXPORT_SYMBOL(bcma_gpio_intmask);
+
+u32 bcma_gpio_polarity(struct bcma_bus *bus, u32 mask, u32 value)
+{
}
+EXPORT_SYMBOL_GPL(bcma_chipco_gpio_intmask);
u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value)
{
- return bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value);
+ unsigned long flags;
+ u32 res = 0;
+ u32 res;
+
+ spin_lock_irqsave(&bus->gpio_lock, flags);
+ res = bcma_chipco_gpio_polarity(&bus->drv_cc, mask, value);
+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
+ spin_lock_irqsave(&cc->gpio_lock, flags);
+ res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value);
+ spin_unlock_irqrestore(&cc->gpio_lock, flags);
+
+ return res;
+}
+EXPORT_SYMBOL(bcma_gpio_polarity);
--- a/drivers/bcma/scan.c
+++ b/drivers/bcma/scan.c
@@ -422,6 +422,10 @@ void bcma_init_bus(struct bcma_bus *bus)
if (bus->init_done)
return;
}
+EXPORT_SYMBOL_GPL(bcma_chipco_gpio_polarity);
+#ifdef CONFIG_BCMA_DRIVER_GPIO
+ spin_lock_init(&bus->gpio_lock);
+#endif
#ifdef CONFIG_BCMA_DRIVER_MIPS
void bcma_chipco_serial_init(struct bcma_drv_cc *cc)
--- a/include/linux/bcma/bcma_driver_chipcommon.h
+++ b/include/linux/bcma/bcma_driver_chipcommon.h
@@ -494,6 +494,9 @@ struct bcma_drv_cc {
int nr_serial_ports;
struct bcma_serial_port serial_ports[4];
#endif /* CONFIG_BCMA_DRIVER_MIPS */
+
INIT_LIST_HEAD(&bus->cores);
bus->nr_cores = 0;
--- a/include/linux/bcma/bcma.h
+++ b/include/linux/bcma/bcma.h
@@ -255,6 +255,11 @@ struct bcma_bus {
struct bcma_drv_mips drv_mips;
struct bcma_drv_gmac_cmn drv_gmac_cmn;
+#ifdef CONFIG_BCMA_DRIVER_GPIO
+ /* Lock for GPIO register access. */
+ spinlock_t gpio_lock;
+#endif /* CONFIG_BCMA_DRIVER_GPIO */
+
/* We decided to share SPROM struct with SSB as long as we do not need
* any hacks for BCMA. This simplifies drivers code. */
struct ssb_sprom sprom;
--- /dev/null
+++ b/include/linux/bcma/bcma_driver_gpio.h
@@ -0,0 +1,21 @@
+#ifndef LINUX_BCMA_DRIVER_GPIO_H_
+#define LINUX_BCMA_DRIVER_GPIO_H_
+
+#include <linux/types.h>
+#include <linux/bcma/bcma.h>
+
+#define BCMA_GPIO_CC_LINES 16
+
+u32 bcma_gpio_in(struct bcma_bus *bus, u32 mask);
+u32 bcma_gpio_out(struct bcma_bus *bus, u32 mask, u32 value);
+u32 bcma_gpio_outen(struct bcma_bus *bus, u32 mask, u32 value);
+u32 bcma_gpio_control(struct bcma_bus *bus, u32 mask, u32 value);
+u32 bcma_gpio_intmask(struct bcma_bus *bus, u32 mask, u32 value);
+u32 bcma_gpio_polarity(struct bcma_bus *bus, u32 mask, u32 value);
+
+static inline int bcma_gpio_count(struct bcma_bus *bus)
};
/* Register access */
@@ -523,13 +526,22 @@ void bcma_chipco_irq_mask(struct bcma_dr
u32 bcma_chipco_irq_status(struct bcma_drv_cc *cc, u32 mask);
+#define BCMA_CC_GPIO_LINES 16
+
/* Chipcommon GPIO pin access. */
-u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask);
-u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value);
-u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value);
-u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value);
-u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value);
-u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value);
+extern u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask);
+extern u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value);
+extern u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value);
+extern u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask,
+ u32 value);
+extern u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask,
+ u32 value);
+extern u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask,
+ u32 value);
+static inline int bcma_chipco_gpio_count(void)
+{
+ return BCMA_GPIO_CC_LINES;
+ return BCMA_CC_GPIO_LINES;
+}
+
+#endif /* LINUX_BCMA_DRIVER_GPIO_H_ */
/* PMU support */
extern void bcma_pmu_init(struct bcma_drv_cc *cc);

28
target/linux/brcm47xx/patches-3.3/502-bcm47xx-rewrite-gpio-handling.patch
Unescape View File

@ -8,8 +8,8 @@
select BOOT_RAW
select CEVT_R4K
select CSRC_R4K
@@ -100,7 +101,6 @@ config BCM47XX
select IRQ_CPU
@@ -101,7 +102,6 @@ config BCM47XX
select NO_EXCEPT_FILL
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
- select GENERIC_GPIO
@ -18,7 +18,7 @@
Support for BCM47XX based boards
--- a/arch/mips/bcm47xx/gpio.c
+++ b/arch/mips/bcm47xx/gpio.c
@@ -4,83 +4,150 @@
@@ -4,83 +4,154 @@
* for more details.
*
* Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
@ -36,7 +36,6 @@
-#include <asm/mach-bcm47xx/gpio.h>
+#include <linux/ssb/ssb_embedded.h>
+#include <linux/bcma/bcma.h>
+#include <linux/bcma/bcma_driver_gpio.h>
+
+#include <bcm47xx.h>
@ -76,7 +75,7 @@
-
- if (test_and_set_bit(gpio, gpio_in_use))
- return -EBUSY;
+ return bcma_gpio_in(&bcm47xx_bus.bcma.bus, mask);
+ return bcma_chipco_gpio_in(&bcm47xx_bus.bcma.bus.drv_cc, mask);
+#endif
+ }
+ return -EINVAL;
@ -93,7 +92,8 @@
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+ case BCM47XX_BUS_TYPE_BCMA:
+ return bcma_gpio_out(&bcm47xx_bus.bcma.bus, mask, value);
+ return bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, mask,
+ value);
#endif
}
return -EINVAL;
@ -114,7 +114,8 @@
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+ case BCM47XX_BUS_TYPE_BCMA:
+ return bcma_gpio_outen(&bcm47xx_bus.bcma.bus, mask, value);
+ return bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc,
+ mask, value);
+#endif
+ }
+ return -EINVAL;
@ -133,7 +134,8 @@
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+ case BCM47XX_BUS_TYPE_BCMA:
+ return bcma_gpio_control(&bcm47xx_bus.bcma.bus, mask, value);
+ return bcma_chipco_gpio_control(&bcm47xx_bus.bcma.bus.drv_cc,
+ mask, value);
+#endif
+ }
+ return -EINVAL;
@ -153,7 +155,8 @@
case BCM47XX_BUS_TYPE_BCMA:
- if (gpio >= BCM47XX_CHIPCO_GPIO_LINES)
- return;
+ return bcma_gpio_intmask(&bcm47xx_bus.bcma.bus, mask, value);
+ return bcma_chipco_gpio_intmask(&bcm47xx_bus.bcma.bus.drv_cc,
+ mask, value);
+#endif
+ }
+ return -EINVAL;
@ -171,7 +174,8 @@
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+ case BCM47XX_BUS_TYPE_BCMA:
+ return bcma_gpio_polarity(&bcm47xx_bus.bcma.bus, mask, value);
+ return bcma_chipco_gpio_polarity(&bcm47xx_bus.bcma.bus.drv_cc,
+ mask, value);
#endif
}
+ return -EINVAL;
@ -213,7 +217,7 @@
{
switch (bcm47xx_bus_type) {
#ifdef CONFIG_BCM47XX_SSB
@@ -99,4 +166,55 @@ int gpio_to_irq(unsigned gpio)
@@ -99,4 +170,55 @@ int gpio_to_irq(unsigned gpio)
}
return -EINVAL;
}
@ -241,7 +245,7 @@
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+ case BCM47XX_BUS_TYPE_BCMA:
+ bcm47xx_gpio_count = bcma_gpio_count(&bcm47xx_bus.bcma.bus);
+ bcm47xx_gpio_count = bcma_chipco_gpio_count();
+ break;
+#endif
+ }

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