parent
4f0b1a6602
commit
ed2c8bdc92
@ -1,23 +0,0 @@ |
||||
From 2f22c9d80acceb853f94ca90989655d88e8bb964 Mon Sep 17 00:00:00 2001
|
||||
From: Imre Kaloz <kaloz@openwrt.org>
|
||||
Date: Thu, 7 Jul 2011 11:39:37 +0200
|
||||
Subject: [PATCH] ARM: make CNS3XXX select CPU_V6K
|
||||
|
||||
CNS3XXX is based on MPCore, so select the right CPU option for it.
|
||||
|
||||
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
|
||||
---
|
||||
arch/arm/Kconfig | 2 +-
|
||||
1 files changed, 1 insertions(+), 1 deletions(-)
|
||||
|
||||
--- a/arch/arm/Kconfig
|
||||
+++ b/arch/arm/Kconfig
|
||||
@@ -322,7 +322,7 @@ config ARCH_CLPS711X
|
||||
|
||||
config ARCH_CNS3XXX
|
||||
bool "Cavium Networks CNS3XXX family"
|
||||
- select CPU_V6
|
||||
+ select CPU_V6K
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select ARM_GIC
|
||||
select MIGHT_HAVE_PCI
|
@ -1,108 +0,0 @@ |
||||
CNS3xxx SOCs have L310-compatible cache controller, so let's use it.
|
||||
|
||||
With this patch benchmarking with 'gzip' shows that performance is
|
||||
doubled, and I'm still able to boot full-fledged userland over NFS
|
||||
(using PCIe NIC), so the support should be pretty robust.
|
||||
|
||||
Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
|
||||
---
|
||||
|
||||
arch/arm/mach-cns3xxx/cns3420vb.c | 2 +
|
||||
arch/arm/mach-cns3xxx/core.c | 43 +++++++++++++++++++++++++++++++++++++
|
||||
arch/arm/mach-cns3xxx/core.h | 6 +++++
|
||||
arch/arm/mm/Kconfig | 2 +-
|
||||
4 files changed, 52 insertions(+), 1 deletions(-)
|
||||
|
||||
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
|
||||
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
|
||||
@@ -192,6 +192,8 @@ static struct platform_device *cns3420_p
|
||||
|
||||
static void __init cns3420_init(void)
|
||||
{
|
||||
+ cns3xxx_l2x0_init();
|
||||
+
|
||||
platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs));
|
||||
|
||||
cns3xxx_ahci_init();
|
||||
--- a/arch/arm/mach-cns3xxx/core.c
|
||||
+++ b/arch/arm/mach-cns3xxx/core.c
|
||||
@@ -16,6 +16,7 @@
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/hardware/gic.h>
|
||||
+#include <asm/hardware/cache-l2x0.h>
|
||||
#include <mach/cns3xxx.h>
|
||||
#include "core.h"
|
||||
|
||||
@@ -244,3 +245,45 @@ static void __init cns3xxx_timer_init(vo
|
||||
struct sys_timer cns3xxx_timer = {
|
||||
.init = cns3xxx_timer_init,
|
||||
};
|
||||
+
|
||||
+#ifdef CONFIG_CACHE_L2X0
|
||||
+
|
||||
+void __init cns3xxx_l2x0_init(void)
|
||||
+{
|
||||
+ void __iomem *base = ioremap(CNS3XXX_L2C_BASE, SZ_4K);
|
||||
+ u32 val;
|
||||
+
|
||||
+ if (WARN_ON(!base))
|
||||
+ return;
|
||||
+
|
||||
+ /*
|
||||
+ * Tag RAM Control register
|
||||
+ *
|
||||
+ * bit[10:8] - 1 cycle of write accesses latency
|
||||
+ * bit[6:4] - 1 cycle of read accesses latency
|
||||
+ * bit[3:0] - 1 cycle of setup latency
|
||||
+ *
|
||||
+ * 1 cycle of latency for setup, read and write accesses
|
||||
+ */
|
||||
+ val = readl(base + L2X0_TAG_LATENCY_CTRL);
|
||||
+ val &= 0xfffff888;
|
||||
+ writel(val, base + L2X0_TAG_LATENCY_CTRL);
|
||||
+
|
||||
+ /*
|
||||
+ * Data RAM Control register
|
||||
+ *
|
||||
+ * bit[10:8] - 1 cycles of write accesses latency
|
||||
+ * bit[6:4] - 1 cycles of read accesses latency
|
||||
+ * bit[3:0] - 1 cycle of setup latency
|
||||
+ *
|
||||
+ * 1 cycle of latency for setup, read and write accesses
|
||||
+ */
|
||||
+ val = readl(base + L2X0_DATA_LATENCY_CTRL);
|
||||
+ val &= 0xfffff888;
|
||||
+ writel(val, base + L2X0_DATA_LATENCY_CTRL);
|
||||
+
|
||||
+ /* 32 KiB, 8-way, parity disable */
|
||||
+ l2x0_init(base, 0x00540000, 0xfe000fff);
|
||||
+}
|
||||
+
|
||||
+#endif /* CONFIG_CACHE_L2X0 */
|
||||
--- a/arch/arm/mach-cns3xxx/core.h
|
||||
+++ b/arch/arm/mach-cns3xxx/core.h
|
||||
@@ -13,6 +13,12 @@
|
||||
|
||||
extern struct sys_timer cns3xxx_timer;
|
||||
|
||||
+#ifdef CONFIG_CACHE_L2X0
|
||||
+void __init cns3xxx_l2x0_init(void);
|
||||
+#else
|
||||
+static inline void cns3xxx_l2x0_init(void) {}
|
||||
+#endif /* CONFIG_CACHE_L2X0 */
|
||||
+
|
||||
void __init cns3xxx_map_io(void);
|
||||
void __init cns3xxx_init_irq(void);
|
||||
void cns3xxx_power_off(void);
|
||||
--- a/arch/arm/mm/Kconfig
|
||||
+++ b/arch/arm/mm/Kconfig
|
||||
@@ -821,7 +821,7 @@ config CACHE_L2X0
|
||||
depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
|
||||
REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \
|
||||
ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
|
||||
- ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE
|
||||
+ ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || ARCH_CNS3XXX
|
||||
default y
|
||||
select OUTER_CACHE
|
||||
select OUTER_CACHE_SYNC
|
@ -0,0 +1,45 @@ |
||||
From b1bd6bd7c230e00b40b0b859f3c23eb56ef39f0c Mon Sep 17 00:00:00 2001
|
||||
From: Imre Kaloz <kaloz@openwrt.org>
|
||||
Date: Fri, 2 Sep 2011 08:07:00 +0200
|
||||
Subject: [PATCH] ARM: remove missing cns3xxx includes
|
||||
|
||||
Commit c9d95fbe59e426eed7f16e7cac812e46ac4772d0 deleted cns3xxx' hardware.h,
|
||||
but didn't remove references for it, breaking the build.
|
||||
|
||||
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
|
||||
---
|
||||
arch/arm/mach-cns3xxx/include/mach/entry-macro.S | 1 -
|
||||
arch/arm/mach-cns3xxx/include/mach/system.h | 1 -
|
||||
arch/arm/mach-cns3xxx/include/mach/uncompress.h | 1 -
|
||||
3 files changed, 0 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
|
||||
+++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
|
||||
@@ -8,7 +8,6 @@
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
-#include <mach/hardware.h>
|
||||
#include <asm/hardware/entry-macro-gic.S>
|
||||
|
||||
.macro disable_fiq
|
||||
--- a/arch/arm/mach-cns3xxx/include/mach/system.h
|
||||
+++ b/arch/arm/mach-cns3xxx/include/mach/system.h
|
||||
@@ -13,7 +13,6 @@
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <asm/proc-fns.h>
|
||||
-#include <mach/hardware.h>
|
||||
|
||||
static inline void arch_idle(void)
|
||||
{
|
||||
--- a/arch/arm/mach-cns3xxx/include/mach/uncompress.h
|
||||
+++ b/arch/arm/mach-cns3xxx/include/mach/uncompress.h
|
||||
@@ -8,7 +8,6 @@
|
||||
*/
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
-#include <mach/hardware.h>
|
||||
#include <mach/cns3xxx.h>
|
||||
|
||||
#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
|
@ -1,6 +1,6 @@ |
||||
--- a/arch/arm/mach-cns3xxx/pcie.c
|
||||
+++ b/arch/arm/mach-cns3xxx/pcie.c
|
||||
@@ -375,8 +375,6 @@ static int __init cns3xxx_pcie_init(void
|
||||
@@ -378,8 +378,6 @@ static int __init cns3xxx_pcie_init(void
|
||||
for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
|
||||
iotable_init(cns3xxx_pcie[i].cfg_bases,
|
||||
ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
|
Loading…
Reference in new issue