parent
c1873c46b8
commit
e439de144f
@ -0,0 +1,68 @@ |
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--- a/drivers/mtd/maps/bcm47xx-flash.c
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+++ b/drivers/mtd/maps/bcm47xx-flash.c
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@@ -44,9 +44,7 @@
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#include <linux/wait.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/map.h>
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-#ifdef CONFIG_MTD_PARTITIONS
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#include <linux/mtd/partitions.h>
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-#endif
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#include <linux/crc32.h>
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#ifdef CONFIG_SSB
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#include <linux/ssb/ssb.h>
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@@ -120,7 +118,6 @@ static struct map_info bcm47xx_map = {
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phys: WINDOW_ADDR,
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};
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-#ifdef CONFIG_MTD_PARTITIONS
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static struct mtd_partition bcm47xx_parts[] = {
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{ name: "cfe", offset: 0, size: 0, mask_flags: MTD_WRITEABLE, },
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@@ -552,7 +549,6 @@ init_mtd_partitions(struct mtd_info *mtd
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return bcm47xx_parts;
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}
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-#endif
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int __init init_bcm47xx_map(void)
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{
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@@ -561,10 +557,8 @@ int __init init_bcm47xx_map(void)
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#endif
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size_t size;
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int ret = 0;
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-#ifdef CONFIG_MTD_PARTITIONS
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struct mtd_partition *parts;
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int i;
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-#endif
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#ifdef CONFIG_SSB
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u32 window = mcore->flash_window;
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@@ -602,15 +596,13 @@ int __init init_bcm47xx_map(void)
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printk(KERN_NOTICE "Flash device: 0x%x at 0x%x\n", size, WINDOW_ADDR);
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-#ifdef CONFIG_MTD_PARTITIONS
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parts = init_mtd_partitions(bcm47xx_mtd, size);
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for (i = 0; parts[i].name; i++);
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- ret = add_mtd_partitions(bcm47xx_mtd, parts, i);
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+ ret = mtd_device_register(bcm47xx_mtd, parts, i);
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if (ret) {
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- printk(KERN_ERR "Flash: add_mtd_partitions failed\n");
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+ printk(KERN_ERR "Flash: mtd_device_register failed\n");
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goto fail;
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}
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-#endif
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return 0;
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fail:
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@@ -624,9 +616,7 @@ int __init init_bcm47xx_map(void)
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void __exit cleanup_bcm47xx_map(void)
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{
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-#ifdef CONFIG_MTD_PARTITIONS
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- del_mtd_partitions(bcm47xx_mtd);
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-#endif
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+ mtd_device_unregister(bcm47xx_mtd);
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map_destroy(bcm47xx_mtd);
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iounmap((void *)bcm47xx_map.virt);
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}
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@ -0,0 +1,28 @@ |
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--- a/drivers/ssb/driver_pcicore.c
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+++ b/drivers/ssb/driver_pcicore.c
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@@ -412,16 +412,6 @@ static int __devinit pcicore_is_in_hostm
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* Workarounds.
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**************************************************/
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-static void __devinit ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc)
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-{
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- u16 tmp = pcicore_read16(pc, SSB_PCICORE_SPROM(0));
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- if (((tmp & 0xF000) >> 12) != pc->dev->core_index) {
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- tmp &= ~0xF000;
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- tmp |= (pc->dev->core_index << 12);
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- pcicore_write16(pc, SSB_PCICORE_SPROM(0), tmp);
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- }
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-}
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-
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static u8 ssb_pcicore_polarity_workaround(struct ssb_pcicore *pc)
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{
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return (ssb_pcie_read(pc, 0x204) & 0x10) ? 0xC0 : 0x80;
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@@ -529,8 +519,6 @@ void __devinit ssb_pcicore_init(struct s
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if (!ssb_device_is_enabled(dev))
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ssb_device_enable(dev, 0);
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- ssb_pcicore_fix_sprom_core_index(pc);
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-
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#ifdef CONFIG_SSB_PCICORE_HOSTMODE
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pc->hostmode = pcicore_is_in_hostmode(pc);
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if (pc->hostmode)
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@ -0,0 +1,25 @@ |
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From 974353557959d8ec1c022511cd1b3eeaa7ed482a Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Sat, 4 Jun 2011 15:55:24 +0200
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Subject: [PATCH 15/15] ssb: fix ssb clock rate according to broadcom source
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This fix was done according to si_clock_rate function in broadcom siutils.c
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/ssb/main.c | 4 ++--
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1 files changed, 2 insertions(+), 2 deletions(-)
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--- a/drivers/ssb/main.c
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+++ b/drivers/ssb/main.c
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@@ -1002,8 +1002,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32
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switch (plltype) {
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case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
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if (m & SSB_CHIPCO_CLK_T6_MMASK)
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- return SSB_CHIPCO_CLK_T6_M0;
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- return SSB_CHIPCO_CLK_T6_M1;
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+ return SSB_CHIPCO_CLK_T6_M1;
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+ return SSB_CHIPCO_CLK_T6_M0;
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case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
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case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
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case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
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Loading…
Reference in new issue