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@ -311,6 +311,12 @@ extern void ar71xx_ddr_flush(u32 reg); |
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#define AR71XX_RESET_REG_PERFC1 0x34 |
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#define AR71XX_RESET_REG_REV_ID 0x90 |
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#define AR91XX_RESET_REG_GLOBAL_INT_STATUS 0x18 |
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#define AR91XX_RESET_REG_RESET_MODULE 0x1c |
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#define AR91XX_RESET_REG_PERF_CTRL 0x20 |
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#define AR91XX_RESET_REG_PERFC0 0x24 |
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#define AR91XX_RESET_REG_PERFC1 0x28 |
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#define WDOG_CTRL_LAST_RESET BIT(31) |
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#define WDOG_CTRL_ACTION_MASK 3 |
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#define WDOG_CTRL_ACTION_NONE 0 /* no action */ |
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