|
|
|
@ -1,6 +1,6 @@ |
|
|
|
|
--- a/arch/mips/ath79/clock.c
|
|
|
|
|
+++ b/arch/mips/ath79/clock.c
|
|
|
|
|
@@ -520,6 +520,100 @@
|
|
|
|
|
@@ -520,6 +520,100 @@ static void __init qca955x_clocks_init(v
|
|
|
|
|
clk_add_alias("uart", NULL, "ref", NULL);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
@ -101,7 +101,7 @@ |
|
|
|
|
void __init ath79_clocks_init(void)
|
|
|
|
|
{
|
|
|
|
|
if (soc_is_ar71xx())
|
|
|
|
|
@@ -536,6 +630,8 @@
|
|
|
|
|
@@ -536,6 +630,8 @@ void __init ath79_clocks_init(void)
|
|
|
|
|
qca953x_clocks_init();
|
|
|
|
|
else if (soc_is_qca955x())
|
|
|
|
|
qca955x_clocks_init();
|
|
|
|
@ -112,7 +112,7 @@ |
|
|
|
|
}
|
|
|
|
|
--- a/arch/mips/ath79/common.c
|
|
|
|
|
+++ b/arch/mips/ath79/common.c
|
|
|
|
|
@@ -77,6 +77,8 @@
|
|
|
|
|
@@ -77,6 +77,8 @@ void ath79_device_reset_set(u32 mask)
|
|
|
|
|
reg = QCA953X_RESET_REG_RESET_MODULE;
|
|
|
|
|
else if (soc_is_qca955x())
|
|
|
|
|
reg = QCA955X_RESET_REG_RESET_MODULE;
|
|
|
|
@ -121,7 +121,7 @@ |
|
|
|
|
else
|
|
|
|
|
panic("Reset register not defined for this SOC");
|
|
|
|
|
|
|
|
|
|
@@ -107,6 +109,8 @@
|
|
|
|
|
@@ -107,6 +109,8 @@ void ath79_device_reset_clear(u32 mask)
|
|
|
|
|
reg = QCA953X_RESET_REG_RESET_MODULE;
|
|
|
|
|
else if (soc_is_qca955x())
|
|
|
|
|
reg = QCA955X_RESET_REG_RESET_MODULE;
|
|
|
|
@ -132,7 +132,7 @@ |
|
|
|
|
|
|
|
|
|
--- a/arch/mips/ath79/dev-common.c
|
|
|
|
|
+++ b/arch/mips/ath79/dev-common.c
|
|
|
|
|
@@ -94,7 +94,8 @@
|
|
|
|
|
@@ -94,7 +94,8 @@ void __init ath79_register_uart(void)
|
|
|
|
|
soc_is_ar913x() ||
|
|
|
|
|
soc_is_ar934x() ||
|
|
|
|
|
soc_is_qca953x() ||
|
|
|
|
@ -144,7 +144,7 @@ |
|
|
|
|
} else if (soc_is_ar933x()) {
|
|
|
|
|
--- a/arch/mips/ath79/dev-eth.c
|
|
|
|
|
+++ b/arch/mips/ath79/dev-eth.c
|
|
|
|
|
@@ -198,6 +198,8 @@
|
|
|
|
|
@@ -198,6 +198,8 @@ void __init ath79_register_mdio(unsigned
|
|
|
|
|
case ATH79_SOC_AR9330:
|
|
|
|
|
case ATH79_SOC_AR9331:
|
|
|
|
|
case ATH79_SOC_QCA9533:
|
|
|
|
@ -153,7 +153,7 @@ |
|
|
|
|
mdio_dev = &ath79_mdio1_device;
|
|
|
|
|
mdio_data = &ath79_mdio1_data;
|
|
|
|
|
break;
|
|
|
|
|
@@ -256,6 +258,8 @@
|
|
|
|
|
@@ -256,6 +258,8 @@ void __init ath79_register_mdio(unsigned
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case ATH79_SOC_QCA9533:
|
|
|
|
@ -162,7 +162,7 @@ |
|
|
|
|
mdio_data->builtin_switch = 1;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
@@ -571,6 +575,8 @@
|
|
|
|
|
@@ -571,6 +575,8 @@ static void __init ath79_init_eth_pll_da
|
|
|
|
|
case ATH79_SOC_QCA9533:
|
|
|
|
|
case ATH79_SOC_QCA9556:
|
|
|
|
|
case ATH79_SOC_QCA9558:
|
|
|
|
@ -171,7 +171,7 @@ |
|
|
|
|
pll_10 = AR934X_PLL_VAL_10;
|
|
|
|
|
pll_100 = AR934X_PLL_VAL_100;
|
|
|
|
|
pll_1000 = AR934X_PLL_VAL_1000;
|
|
|
|
|
@@ -627,6 +633,8 @@
|
|
|
|
|
@@ -627,6 +633,8 @@ static int __init ath79_setup_phy_if_mod
|
|
|
|
|
case ATH79_SOC_AR9330:
|
|
|
|
|
case ATH79_SOC_AR9331:
|
|
|
|
|
case ATH79_SOC_QCA9533:
|
|
|
|
@ -180,7 +180,7 @@ |
|
|
|
|
pdata->phy_if_mode = PHY_INTERFACE_MODE_MII;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
@@ -688,6 +696,8 @@
|
|
|
|
|
@@ -688,6 +696,8 @@ static int __init ath79_setup_phy_if_mod
|
|
|
|
|
case ATH79_SOC_AR9330:
|
|
|
|
|
case ATH79_SOC_AR9331:
|
|
|
|
|
case ATH79_SOC_QCA9533:
|
|
|
|
@ -189,7 +189,7 @@ |
|
|
|
|
pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
@@ -992,6 +1002,8 @@
|
|
|
|
|
@@ -992,6 +1002,8 @@ void __init ath79_register_eth(unsigned
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case ATH79_SOC_QCA9533:
|
|
|
|
@ -198,7 +198,7 @@ |
|
|
|
|
if (id == 0) {
|
|
|
|
|
pdata->reset_bit = AR933X_RESET_GE0_MAC |
|
|
|
|
|
AR933X_RESET_GE0_MDIO;
|
|
|
|
|
@@ -1097,6 +1109,8 @@
|
|
|
|
|
@@ -1097,6 +1109,8 @@ void __init ath79_register_eth(unsigned
|
|
|
|
|
case ATH79_SOC_AR9330:
|
|
|
|
|
case ATH79_SOC_AR9331:
|
|
|
|
|
case ATH79_SOC_QCA9533:
|
|
|
|
@ -209,7 +209,7 @@ |
|
|
|
|
|
|
|
|
|
--- a/arch/mips/ath79/dev-usb.c
|
|
|
|
|
+++ b/arch/mips/ath79/dev-usb.c
|
|
|
|
|
@@ -272,6 +272,19 @@
|
|
|
|
|
@@ -272,6 +272,19 @@ static void __init qca955x_usb_setup(voi
|
|
|
|
|
&ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
@ -229,7 +229,7 @@ |
|
|
|
|
void __init ath79_register_usb(void)
|
|
|
|
|
{
|
|
|
|
|
if (soc_is_ar71xx())
|
|
|
|
|
@@ -288,6 +301,8 @@
|
|
|
|
|
@@ -288,6 +301,8 @@ void __init ath79_register_usb(void)
|
|
|
|
|
ar934x_usb_setup();
|
|
|
|
|
else if (soc_is_qca955x())
|
|
|
|
|
qca955x_usb_setup();
|
|
|
|
@ -240,7 +240,7 @@ |
|
|
|
|
}
|
|
|
|
|
--- a/arch/mips/ath79/dev-wmac.c
|
|
|
|
|
+++ b/arch/mips/ath79/dev-wmac.c
|
|
|
|
|
@@ -189,6 +189,24 @@
|
|
|
|
|
@@ -189,6 +189,24 @@ static void qca955x_wmac_setup(void)
|
|
|
|
|
ath79_wmac_data.is_clk_25mhz = true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
@ -265,7 +265,7 @@ |
|
|
|
|
static bool __init
|
|
|
|
|
ar93xx_wmac_otp_read_word(void __iomem *base, int addr, u32 *data)
|
|
|
|
|
{
|
|
|
|
|
@@ -392,6 +410,8 @@
|
|
|
|
|
@@ -392,6 +410,8 @@ void __init ath79_register_wmac(u8 *cal_
|
|
|
|
|
qca953x_wmac_setup();
|
|
|
|
|
else if (soc_is_qca955x())
|
|
|
|
|
qca955x_wmac_setup();
|
|
|
|
@ -276,7 +276,7 @@ |
|
|
|
|
|
|
|
|
|
--- a/arch/mips/ath79/early_printk.c
|
|
|
|
|
+++ b/arch/mips/ath79/early_printk.c
|
|
|
|
|
@@ -117,6 +117,8 @@
|
|
|
|
|
@@ -117,6 +117,8 @@ static void prom_putchar_init(void)
|
|
|
|
|
case REV_ID_MAJOR_QCA9533:
|
|
|
|
|
case REV_ID_MAJOR_QCA9556:
|
|
|
|
|
case REV_ID_MAJOR_QCA9558:
|
|
|
|
@ -287,7 +287,7 @@ |
|
|
|
|
|
|
|
|
|
--- a/arch/mips/ath79/gpio.c
|
|
|
|
|
+++ b/arch/mips/ath79/gpio.c
|
|
|
|
|
@@ -148,7 +148,8 @@
|
|
|
|
|
@@ -148,7 +148,8 @@ static void __iomem *ath79_gpio_get_func
|
|
|
|
|
soc_is_ar913x() ||
|
|
|
|
|
soc_is_ar933x())
|
|
|
|
|
reg = AR71XX_GPIO_REG_FUNC;
|
|
|
|
@ -297,7 +297,7 @@ |
|
|
|
|
reg = AR934X_GPIO_REG_FUNC;
|
|
|
|
|
else
|
|
|
|
|
BUG();
|
|
|
|
|
@@ -228,12 +229,15 @@
|
|
|
|
|
@@ -228,12 +229,15 @@ void __init ath79_gpio_init(void)
|
|
|
|
|
ath79_gpio_count = QCA953X_GPIO_COUNT;
|
|
|
|
|
else if (soc_is_qca955x())
|
|
|
|
|
ath79_gpio_count = QCA955X_GPIO_COUNT;
|
|
|
|
@ -316,7 +316,7 @@ |
|
|
|
|
}
|
|
|
|
|
--- a/arch/mips/ath79/irq.c
|
|
|
|
|
+++ b/arch/mips/ath79/irq.c
|
|
|
|
|
@@ -107,7 +107,8 @@
|
|
|
|
|
@@ -107,7 +107,8 @@ static void __init ath79_misc_irq_init(v
|
|
|
|
|
soc_is_ar933x() ||
|
|
|
|
|
soc_is_ar934x() ||
|
|
|
|
|
soc_is_qca953x() ||
|
|
|
|
@ -326,7 +326,7 @@ |
|
|
|
|
ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
|
|
|
|
|
else
|
|
|
|
|
BUG();
|
|
|
|
|
@@ -236,6 +237,99 @@
|
|
|
|
|
@@ -236,6 +237,99 @@ static void qca955x_irq_init(void)
|
|
|
|
|
irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
@ -426,7 +426,7 @@ |
|
|
|
|
asmlinkage void plat_irq_dispatch(void)
|
|
|
|
|
{
|
|
|
|
|
unsigned long pending;
|
|
|
|
|
@@ -359,6 +453,9 @@
|
|
|
|
|
@@ -359,6 +453,9 @@ void __init arch_init_irq(void)
|
|
|
|
|
} else if (soc_is_qca955x()) {
|
|
|
|
|
ath79_ip2_handler = ath79_default_ip2_handler;
|
|
|
|
|
ath79_ip3_handler = ath79_default_ip3_handler;
|
|
|
|
@ -436,7 +436,7 @@ |
|
|
|
|
} else {
|
|
|
|
|
BUG();
|
|
|
|
|
}
|
|
|
|
|
@@ -371,4 +468,6 @@
|
|
|
|
|
@@ -371,4 +468,6 @@ void __init arch_init_irq(void)
|
|
|
|
|
ar934x_ip2_irq_init();
|
|
|
|
|
else if (soc_is_qca955x())
|
|
|
|
|
qca955x_irq_init();
|
|
|
|
@ -445,7 +445,7 @@ |
|
|
|
|
}
|
|
|
|
|
--- a/arch/mips/ath79/Kconfig
|
|
|
|
|
+++ b/arch/mips/ath79/Kconfig
|
|
|
|
|
@@ -1155,6 +1155,12 @@
|
|
|
|
|
@@ -1165,6 +1165,12 @@ config SOC_QCA955X
|
|
|
|
|
select PCI_AR724X if PCI
|
|
|
|
|
def_bool n
|
|
|
|
|
|
|
|
|
@ -458,7 +458,7 @@ |
|
|
|
|
config ATH79_DEV_M25P80
|
|
|
|
|
select ATH79_DEV_SPI
|
|
|
|
|
def_bool n
|
|
|
|
|
@@ -1192,7 +1198,7 @@
|
|
|
|
|
@@ -1202,7 +1208,7 @@ config ATH79_DEV_USB
|
|
|
|
|
def_bool n
|
|
|
|
|
|
|
|
|
|
config ATH79_DEV_WMAC
|
|
|
|
@ -469,7 +469,7 @@ |
|
|
|
|
config ATH79_NVRAM
|
|
|
|
|
--- a/arch/mips/ath79/pci.c
|
|
|
|
|
+++ b/arch/mips/ath79/pci.c
|
|
|
|
|
@@ -68,6 +68,21 @@
|
|
|
|
|
@@ -68,6 +68,21 @@ static const struct ath79_pci_irq qca955
|
|
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
@ -491,7 +491,7 @@ |
|
|
|
|
int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
|
|
|
|
|
{
|
|
|
|
|
int irq = -1;
|
|
|
|
|
@@ -86,6 +101,9 @@
|
|
|
|
|
@@ -86,6 +101,9 @@ int __init pcibios_map_irq(const struct
|
|
|
|
|
} else if (soc_is_qca955x()) {
|
|
|
|
|
ath79_pci_irq_map = qca955x_pci_irq_map;
|
|
|
|
|
ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map);
|
|
|
|
@ -501,7 +501,7 @@ |
|
|
|
|
} else {
|
|
|
|
|
pr_crit("pci %s: invalid irq map\n",
|
|
|
|
|
pci_name((struct pci_dev *) dev));
|
|
|
|
|
@@ -303,6 +321,15 @@
|
|
|
|
|
@@ -303,6 +321,15 @@ int __init ath79_register_pci(void)
|
|
|
|
|
QCA955X_PCI_MEM_SIZE,
|
|
|
|
|
1,
|
|
|
|
|
ATH79_IP3_IRQ(2));
|
|
|
|
@ -519,7 +519,7 @@ |
|
|
|
|
return -ENODEV;
|
|
|
|
|
--- a/arch/mips/ath79/setup.c
|
|
|
|
|
+++ b/arch/mips/ath79/setup.c
|
|
|
|
|
@@ -170,15 +170,30 @@
|
|
|
|
|
@@ -170,15 +170,30 @@ static void __init ath79_detect_sys_type
|
|
|
|
|
rev = id & QCA955X_REV_ID_REVISION_MASK;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
@ -734,7 +734,7 @@ |
|
|
|
|
* SRIF block
|
|
|
|
|
--- a/arch/mips/include/asm/mach-ath79/ath79.h
|
|
|
|
|
+++ b/arch/mips/include/asm/mach-ath79/ath79.h
|
|
|
|
|
@@ -35,6 +35,8 @@
|
|
|
|
|
@@ -35,6 +35,8 @@ enum ath79_soc_type {
|
|
|
|
|
ATH79_SOC_QCA9533,
|
|
|
|
|
ATH79_SOC_QCA9556,
|
|
|
|
|
ATH79_SOC_QCA9558,
|
|
|
|
@ -743,7 +743,7 @@ |
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
extern enum ath79_soc_type ath79_soc;
|
|
|
|
|
@@ -126,6 +128,21 @@
|
|
|
|
|
@@ -126,6 +128,21 @@ static inline int soc_is_qca955x(void)
|
|
|
|
|
return soc_is_qca9556() || soc_is_qca9558();
|
|
|
|
|
}
|
|
|
|
|
|