ar71xx: disable devicetree support

While we'd like to convert ar71xx to DT-based configuration
eventually, we aren't quite there yet, and shipping half-baked DT support
that is not used at all wastes precious space.

Saves ~120KB before LZMA, ~33KB after LZMA.

Run-tested on TP-Link CPE510 and TL-WR841 v7.

Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
master
Matthias Schiffer 7 years ago
parent e9fa0b9f3a
commit d04056e5ea
No known key found for this signature in database
GPG Key ID: 16EF3F64CB201D9C
  1. 21
      target/linux/ar71xx/config-4.9
  2. 1
      target/linux/ar71xx/mikrotik/config-default
  3. 70
      target/linux/ar71xx/patches-4.9/604-MIPS-ath79-no-of.patch
  4. 4
      target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch
  5. 4
      target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch

@ -284,7 +284,6 @@ CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CSRC_R4K=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_ETHERNET_PACKET_MANGLE=y
CONFIG_FIXED_PHY=y
@ -360,14 +359,12 @@ CONFIG_INITRAMFS_ROOT_UID=0
CONFIG_INITRAMFS_SOURCE="../../root"
CONFIG_INTEL_XWAY_PHY=y
CONFIG_IP17XX_PHY=y
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_LEDS_GPIO=y
# CONFIG_LEDS_WNDR3700_USB is not set
CONFIG_LIBFDT=y
CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BOARDINFO=y
@ -378,15 +375,10 @@ CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_CLOCK_VSYSCALL=y
# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
# CONFIG_MIPS_CMDLINE_FROM_DTB is not set
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MACHINE=y
CONFIG_MIPS_NO_APPENDED_DTB=y
# CONFIG_MIPS_RAW_APPENDED_DTB is not set
CONFIG_MIPS_SPRAM=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
@ -422,17 +414,7 @@ CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
# CONFIG_NO_IOPORT_MAP is not set
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_ADDRESS_PCI=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_OF_PCI=y
CONFIG_OF_PCI_IRQ=y
# CONFIG_OF is not set
CONFIG_PCI=y
CONFIG_PCI_AR724X=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
@ -486,4 +468,3 @@ CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y

@ -235,7 +235,6 @@ CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_RB4XX=y
CONFIG_MTD_NAND_RB750=y
CONFIG_MTD_NAND_RB91X=y
# CONFIG_MTD_OF_PARTS is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
# CONFIG_MTD_SPLIT_EVA_FW is not set

@ -0,0 +1,70 @@
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -195,7 +195,6 @@ config ATH79
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_MIPS16
select SYS_SUPPORTS_ZBOOT_UART_PROM
- select USE_OF
help
Support for the Atheros AR71XX/AR724X/AR913X SoCs.
--- a/arch/mips/ath79/setup.c
+++ b/arch/mips/ath79/setup.c
@@ -196,16 +196,20 @@ unsigned int get_c0_compare_int(void)
void __init plat_mem_setup(void)
{
+#ifdef CONFIG_OF
unsigned long fdt_start;
+#endif
set_io_port_base(KSEG1);
+#ifdef CONFIG_OF
/* Get the position of the FDT passed by the bootloader */
fdt_start = fw_getenvl("fdt_start");
if (fdt_start)
__dt_setup_arch((void *)KSEG0ADDR(fdt_start));
else if (fw_passed_dtb)
__dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb));
+#endif
if (mips_machtype != ATH79_MACH_GENERIC_OF) {
ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
@@ -301,17 +305,21 @@ static int __init ath79_setup(void)
arch_initcall(ath79_setup);
+#ifdef CONFIG_OF
void __init device_tree_init(void)
{
unflatten_and_copy_device_tree();
}
+#endif
MIPS_MACHINE(ATH79_MACH_GENERIC,
"Generic",
"Generic AR71XX/AR724X/AR913X based board",
NULL);
+#ifdef CONFIG_OF
MIPS_MACHINE(ATH79_MACH_GENERIC_OF,
"DTB",
"Generic AR71XX/AR724X/AR913X based board (DT)",
NULL);
+#endif
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -33,10 +33,12 @@
#define AR724X_BASE_FREQ 40000000
static struct clk *clks[ATH79_CLK_END];
+#ifdef CONFIG_OF
static struct clk_onecell_data clk_data = {
.clks = clks,
.clk_num = ARRAY_SIZE(clks),
};
+#endif
static struct clk *__init ath79_add_sys_clkdev(
const char *id, unsigned long rate)

@ -44,7 +44,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
config ATH79_NVRAM
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -356,6 +356,91 @@ static void __init ar934x_clocks_init(vo
@@ -358,6 +358,91 @@ static void __init ar934x_clocks_init(vo
iounmap(dpll_base);
}
@ -136,7 +136,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
static void __init qca955x_clocks_init(void)
{
unsigned long ref_rate;
@@ -451,6 +536,8 @@ void __init ath79_clocks_init(void)
@@ -453,6 +538,8 @@ void __init ath79_clocks_init(void)
ar933x_clocks_init();
else if (soc_is_ar934x())
ar934x_clocks_init();

@ -24,7 +24,7 @@
config ATH79_NVRAM
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -526,6 +526,100 @@ static void __init qca955x_clocks_init(v
@@ -528,6 +528,100 @@ static void __init qca955x_clocks_init(v
clk_add_alias("uart", NULL, "ref", NULL);
}
@ -125,7 +125,7 @@
void __init ath79_clocks_init(void)
{
if (soc_is_ar71xx())
@@ -540,6 +634,8 @@ void __init ath79_clocks_init(void)
@@ -542,6 +636,8 @@ void __init ath79_clocks_init(void)
qca953x_clocks_init();
else if (soc_is_qca955x())
qca955x_clocks_init();

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