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@ -60,14 +60,14 @@ struct tnetd7300_clock { |
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#define PLL_DIV 0x00000002 |
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#define PLL_STATUS 0x00000001 |
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u32 unused2[3]; |
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} __attribute__ ((packed)); |
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} __packed; |
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struct tnetd7300_clocks { |
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struct tnetd7300_clock bus; |
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struct tnetd7300_clock cpu; |
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struct tnetd7300_clock usb; |
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struct tnetd7300_clock dsp; |
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} __attribute__ ((packed)); |
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} __packed; |
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struct tnetd7200_clock { |
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volatile u32 ctrl; |
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@ -82,13 +82,13 @@ struct tnetd7200_clock { |
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volatile u32 status; |
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volatile u32 cmden; |
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u32 padding[15]; |
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} __attribute__ ((packed)); |
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} __packed; |
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struct tnetd7200_clocks { |
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struct tnetd7200_clock cpu; |
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struct tnetd7200_clock dsp; |
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struct tnetd7200_clock usb; |
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} __attribute__ ((packed)); |
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} __packed; |
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int ar7_cpu_clock = 150000000; |
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EXPORT_SYMBOL(ar7_cpu_clock); |
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@ -117,8 +117,8 @@ static void approximate(int base, int target, int *prediv, |
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int *postdiv, int *mul) |
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{ |
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int i, j, k, freq, res = target; |
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for (i = 1; i <= 16; i++) { |
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for (j = 1; j <= 32; j++) { |
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for (i = 1; i <= 16; i++) |
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for (j = 1; j <= 32; j++) |
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for (k = 1; k <= 32; k++) { |
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freq = abs(base / j * i / k - target); |
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if (freq < res) { |
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@ -128,8 +128,6 @@ static void approximate(int base, int target, int *prediv, |
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*postdiv = k; |
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} |
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} |
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} |
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} |
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} |
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static void calculate(int base, int target, int *prediv, int *postdiv, |
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@ -249,9 +247,9 @@ static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock, |
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clock->ctrl = ((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1); |
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mdelay(1); |
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clock->pll = 4; |
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do { |
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do |
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status = clock->pll; |
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} while (status & PLL_STATUS); |
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while (status & PLL_STATUS); |
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clock->pll = ((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e; |
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mdelay(75); |
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} |
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@ -267,12 +265,11 @@ static void __init tnetd7300_init_clocks(void) |
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ar7_bus_clock = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, |
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&clocks->bus, bootcr, AR7_AFE_CLOCK); |
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if (*bootcr & BOOT_PLL_ASYNC_MODE) { |
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if (*bootcr & BOOT_PLL_ASYNC_MODE) |
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ar7_cpu_clock = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT, |
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&clocks->cpu, bootcr, AR7_AFE_CLOCK); |
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} else { |
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else |
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ar7_cpu_clock = ar7_bus_clock; |
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} |
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/*
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tnetd7300_set_clock(USB_PLL_SOURCE_SHIFT, &clocks->usb, |
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bootcr, 48000000); |
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@ -333,7 +330,7 @@ static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock, |
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static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr) |
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{ |
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if (*bootcr & BOOT_PLL_ASYNC_MODE) { |
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if (*bootcr & BOOT_PLL_ASYNC_MODE) |
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/* Async */ |
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switch (clock_id) { |
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case TNETD7200_CLOCK_ID_DSP: |
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@ -341,9 +338,9 @@ static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr) |
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default: |
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return AR7_AFE_CLOCK; |
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} |
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} else { |
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else |
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/* Sync */ |
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if (*bootcr & BOOT_PLL_2TO1_MODE) { |
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if (*bootcr & BOOT_PLL_2TO1_MODE) |
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/* 2:1 */ |
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switch (clock_id) { |
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case TNETD7200_CLOCK_ID_DSP: |
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@ -351,11 +348,9 @@ static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr) |
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default: |
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return AR7_AFE_CLOCK; |
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} |
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} else { |
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else |
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/* 1:1 */ |
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return AR7_REF_CLOCK; |
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} |
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} |
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} |
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@ -420,7 +415,7 @@ static void __init tnetd7200_init_clocks(void) |
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cpu_prediv, cpu_postdiv, -1, cpu_mul, |
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ar7_cpu_clock); |
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} else { |
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} else |
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if (*bootcr & BOOT_PLL_2TO1_MODE) { |
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printk(KERN_INFO "Clocks: Sync 2:1 mode\n"); |
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@ -454,7 +449,6 @@ static void __init tnetd7200_init_clocks(void) |
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ar7_cpu_clock = ar7_bus_clock; |
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} |
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} |
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printk(KERN_INFO "Clocks: Setting USB clock\n"); |
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usb_base = ar7_bus_clock; |
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