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@ -139,7 +139,7 @@ ar8327_phy_rgmii_set(struct ar8xxx_priv *priv, struct phy_device *phydev) |
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if (!of_property_read_bool(np, "qca,phy-rgmii-en")) { |
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if (!of_property_read_bool(np, "qca,phy-rgmii-en")) { |
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pr_err("ar8327: qca,phy-rgmii-en is not specified\n"); |
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pr_err("ar8327: qca,phy-rgmii-en is not specified\n"); |
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return -EINVAL; |
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return; |
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} |
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} |
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ar8xxx_phy_dbg_read(priv, phyaddr, |
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ar8xxx_phy_dbg_read(priv, phyaddr, |
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AR8327_PHY_MODE_SEL, &phy_val); |
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AR8327_PHY_MODE_SEL, &phy_val); |
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@ -150,7 +150,7 @@ ar8327_phy_rgmii_set(struct ar8xxx_priv *priv, struct phy_device *phydev) |
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/* set rgmii tx clock delay if needed */ |
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/* set rgmii tx clock delay if needed */ |
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if (!of_property_read_bool(np, "qca,txclk-delay-en")) { |
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if (!of_property_read_bool(np, "qca,txclk-delay-en")) { |
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pr_err("ar8327: qca,txclk-delay-en is not specified\n"); |
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pr_err("ar8327: qca,txclk-delay-en is not specified\n"); |
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return -EINVAL; |
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return; |
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} |
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} |
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ar8xxx_phy_dbg_read(priv, phyaddr, |
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ar8xxx_phy_dbg_read(priv, phyaddr, |
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AR8327_PHY_SYS_CTRL, &phy_val); |
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AR8327_PHY_SYS_CTRL, &phy_val); |
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@ -161,7 +161,7 @@ ar8327_phy_rgmii_set(struct ar8xxx_priv *priv, struct phy_device *phydev) |
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/* set rgmii rx clock delay if needed */ |
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/* set rgmii rx clock delay if needed */ |
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if (!of_property_read_bool(np, "qca,rxclk-delay-en")) { |
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if (!of_property_read_bool(np, "qca,rxclk-delay-en")) { |
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pr_err("ar8327: qca,rxclk-delay-en is not specified\n"); |
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pr_err("ar8327: qca,rxclk-delay-en is not specified\n"); |
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return -EINVAL; |
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return; |
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} |
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} |
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ar8xxx_phy_dbg_read(priv, phyaddr, |
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ar8xxx_phy_dbg_read(priv, phyaddr, |
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AR8327_PHY_TEST_CTRL, &phy_val); |
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AR8327_PHY_TEST_CTRL, &phy_val); |
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