TP-Link TL-WR942N v1 is a 2.4 GHz single-band N450 router, based on Qualcomm/Atheros QCA9561. Specification: - 775/650/258 MHz (CPU/DDR/AHB) - 128 MB of RAM (DDR2) - 16 MB of FLASH (SPI NOR) - 3T3R 2.4 GHz - 5x 10/100 Mbps Ethernet - 2x USB 2.0 - 11x LED (most are controlled by 74HC595) - 2x button - UART header on PCB* * Serial console is disabled in OEM non-beta firmwares and corresponding GPIO pins 14 and 15 are assigned to control USB1 and USB2 LEDs by production (non-beta) U-Boot and firmware. Currently not working: 1. USB1 and USB2 LEDs if UART RX and TX pins are assigned to their GPIOs by some U-Boot versions. Flash instruction under vendor GUI: 1. Download "lede-ar71xx-generic-tl-wr942n-v1-squashfs-factory.bin". 2. Go to WEB interface and perform usual firmware upgrade. FLash instruction under U-Boot recovery mode (doesn't work in beta firmware): 1. Setup PC with static IP "192.168.0.66/24" and tftp server. 2. Change "*-factory" image filename to "WR942v1_recovery.bin" and make it available to download from your tftp server. 3. Press "reset" button and power up the router, wait till "WPS" LED turns on. Flash instruction under U-Boot, using UART (can be done only with preinstalled UART-enabled U-Boot version!): 1. Use "tpl" to stop autobooting and obtain U-Boot CLI access. 2. Setup ip addresses for U-Boot and your tftp server. 3. Issue below commands: tftp 0x81000000 lede-ar71xx-generic-tl-wr942n-v1-sysupgrade.bin erase 0x9f020000 +$filesize cp.b 0x81000000 0x9f020000 $filesize reset Signed-off-by: Serg Studzinskii <serguzhg@gmail.com> [minor code style fixes, extended commit message] Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>master
Serg Studzinskii
7 years ago
committed by
Piotr Dymacz
parent
641af0c39d
commit
b7cc661615
@ -0,0 +1,279 @@ |
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/*
|
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* TP-Link TL-WR942N(RU) v1 board support |
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* |
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* Copyright (C) 2017 Sergey Studzinski <serguzhg@gmail.com> |
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* Thanks to Henryk Heisig <hyniu@o2.pl> |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 as published |
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* by the Free Software Foundation. |
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*/ |
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#include <linux/platform_device.h> |
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#include <linux/ath9k_platform.h> |
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#include <asm/mach-ath79/ar71xx_regs.h> |
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#include <linux/gpio.h> |
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#include <linux/init.h> |
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#include <linux/spi/spi_gpio.h> |
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#include <linux/spi/74x164.h> |
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#include "common.h" |
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#include "dev-m25p80.h" |
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#include "machtypes.h" |
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#include "dev-eth.h" |
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#include "dev-gpio-buttons.h" |
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#include "dev-leds-gpio.h" |
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#include "dev-spi.h" |
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#include "dev-usb.h" |
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#include "dev-wmac.h" |
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#include "nvram.h" |
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#define TL_WR942N_V1_KEYS_POLL_INTERVAL 20 |
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#define TL_WR942N_V1_KEYS_DEBOUNCE_INTERVAL \ |
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(3 * TL_WR942N_V1_KEYS_POLL_INTERVAL) |
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#define TL_WR942N_V1_GPIO_BTN_RESET 1 |
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#define TL_WR942N_V1_GPIO_BTN_RFKILL 2 |
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#define TL_WR942N_V1_GPIO_UART_TX 4 |
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#define TL_WR942N_V1_GPIO_UART_RX 5 |
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#define TL_WR942N_V1_GPIO_LED_USB2 14 |
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#define TL_WR942N_V1_GPIO_LED_USB1 15 |
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#define TL_WR942N_V1_GPIO_SHIFT_OE 16 |
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#define TL_WR942N_V1_GPIO_SHIFT_SER 17 |
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#define TL_WR942N_V1_GPIO_SHIFT_SRCLK 18 |
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#define TL_WR942N_V1_GPIO_SHIFT_SRCLR 19 |
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#define TL_WR942N_V1_GPIO_SHIFT_RCLK 20 |
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#define TL_WR942N_V1_GPIO_LED_WPS 21 |
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#define TL_WR942N_V1_GPIO_LED_STATUS 22 |
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#define TL_WR942N_V1_74HC_GPIO_BASE QCA956X_GPIO_COUNT |
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#define TL_WR942N_V1_74HC_GPIO_LED_LAN4 23 |
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#define TL_WR942N_V1_74HC_GPIO_LED_LAN3 24 |
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#define TL_WR942N_V1_74HC_GPIO_LED_LAN2 25 |
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#define TL_WR942N_V1_74HC_GPIO_LED_LAN1 26 |
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#define TL_WR942N_V1_74HC_GPIO_LED_WAN_GREEN 27 |
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#define TL_WR942N_V1_74HC_GPIO_LED_WAN_AMBER 28 |
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#define TL_WR942N_V1_74HC_GPIO_LED_WLAN 29 |
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#define TL_WR942N_V1_74HC_GPIO_HUB_RESET 30 /* from u-boot sources */ |
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#define TL_WR942N_V1_SSR_BIT_0 0 |
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#define TL_WR942N_V1_SSR_BIT_1 1 |
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#define TL_WR942N_V1_SSR_BIT_2 2 |
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#define TL_WR942N_V1_SSR_BIT_3 3 |
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#define TL_WR942N_V1_SSR_BIT_4 4 |
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#define TL_WR942N_V1_SSR_BIT_5 5 |
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#define TL_WR942N_V1_SSR_BIT_6 6 |
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#define TL_WR942N_V1_SSR_BIT_7 7 |
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#define TL_WR942N_V1_WMAC_CALDATA_OFFSET 0x1000 |
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#define TL_WR942N_V1_DEFAULT_MAC_ADDR 0x1fe40008 |
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#define TL_WR942N_V1_DEFAULT_MAC_SIZE 0x200 |
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#define GPIO_IN_ENABLE0_UART_SIN_LSB 8 |
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#define GPIO_IN_ENABLE0_UART_SIN_MASK 0x0000ff00 |
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static struct gpio_led tl_wr942n_v1_leds_gpio[] __initdata = { |
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{ |
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.name = "tl-wr942n-v1:green:status", |
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.gpio = TL_WR942N_V1_GPIO_LED_STATUS, |
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.active_low = 1, |
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}, { |
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.name = "tl-wr942n-v1:green:wlan", |
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.gpio = TL_WR942N_V1_74HC_GPIO_LED_WLAN, |
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.active_low = 1, |
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}, { |
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.name = "tl-wr942n-v1:green:lan1", |
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.gpio = TL_WR942N_V1_74HC_GPIO_LED_LAN1, |
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.active_low = 1, |
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}, { |
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.name = "tl-wr942n-v1:green:lan2", |
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.gpio = TL_WR942N_V1_74HC_GPIO_LED_LAN2, |
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.active_low = 1, |
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}, { |
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.name = "tl-wr942n-v1:green:lan3", |
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.gpio = TL_WR942N_V1_74HC_GPIO_LED_LAN3, |
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.active_low = 1, |
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}, { |
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.name = "tl-wr942n-v1:green:lan4", |
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.gpio = TL_WR942N_V1_74HC_GPIO_LED_LAN4, |
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.active_low = 1, |
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}, { |
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.name = "tl-wr942n-v1:green:wan", |
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.gpio = TL_WR942N_V1_74HC_GPIO_LED_WAN_GREEN, |
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.active_low = 1, |
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}, { |
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.name = "tl-wr942n-v1:amber:wan", |
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.gpio = TL_WR942N_V1_74HC_GPIO_LED_WAN_AMBER, |
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.active_low = 1, |
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}, { |
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.name = "tl-wr942n-v1:green:wps", |
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.gpio = TL_WR942N_V1_GPIO_LED_WPS, |
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.active_low = 1, |
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}, { |
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.name = "tl-wr942n-v1:green:usb1", |
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.gpio = TL_WR942N_V1_GPIO_LED_USB1, |
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.active_low = 1, |
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}, { |
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.name = "tl-wr942n-v1:green:usb2", |
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.gpio = TL_WR942N_V1_GPIO_LED_USB2, |
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.active_low = 1, |
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}, |
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}; |
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static struct gpio_keys_button tl_wr942n_v1_gpio_keys[] __initdata = { |
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{ |
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.desc = "Reset button", |
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.type = EV_KEY, |
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.code = KEY_RESTART, |
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.debounce_interval = TL_WR942N_V1_KEYS_DEBOUNCE_INTERVAL, |
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.gpio = TL_WR942N_V1_GPIO_BTN_RESET, |
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.active_low = 1, |
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}, { |
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.desc = "RFKILL button", |
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.type = EV_KEY, |
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.code = KEY_RFKILL, |
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.debounce_interval = TL_WR942N_V1_KEYS_DEBOUNCE_INTERVAL, |
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.gpio = TL_WR942N_V1_GPIO_BTN_RFKILL, |
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.active_low = 1, |
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}, |
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}; |
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static struct spi_gpio_platform_data tl_wr942n_v1_spi_data = { |
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.sck = TL_WR942N_V1_GPIO_SHIFT_SRCLK, |
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.miso = SPI_GPIO_NO_MISO, |
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.mosi = TL_WR942N_V1_GPIO_SHIFT_SER, |
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.num_chipselect = 1, |
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}; |
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static u8 tl_wr942n_v1_ssr_initdata[] __initdata = { |
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BIT(TL_WR942N_V1_SSR_BIT_7) | |
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BIT(TL_WR942N_V1_SSR_BIT_6) | |
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BIT(TL_WR942N_V1_SSR_BIT_5) | |
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BIT(TL_WR942N_V1_SSR_BIT_4) | |
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BIT(TL_WR942N_V1_SSR_BIT_3) | |
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BIT(TL_WR942N_V1_SSR_BIT_2) | |
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BIT(TL_WR942N_V1_SSR_BIT_1) | |
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BIT(TL_WR942N_V1_SSR_BIT_0) |
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}; |
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static struct gen_74x164_chip_platform_data tl_wr942n_v1_ssr_data = { |
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.base = TL_WR942N_V1_74HC_GPIO_BASE, |
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.num_registers = ARRAY_SIZE(tl_wr942n_v1_ssr_initdata), |
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.init_data = tl_wr942n_v1_ssr_initdata, |
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}; |
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static struct platform_device tl_wr942n_v1_spi_device = { |
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.name = "spi_gpio", |
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.id = 1, |
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.dev = { |
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.platform_data = &tl_wr942n_v1_spi_data, |
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}, |
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}; |
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static struct spi_board_info tl_wr942n_v1_spi_info[] = { |
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{ |
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.bus_num = 1, |
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.chip_select = 0, |
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.max_speed_hz = 10000000, |
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.modalias = "74x164", |
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.platform_data = &tl_wr942n_v1_ssr_data, |
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.controller_data = (void *) TL_WR942N_V1_GPIO_SHIFT_RCLK, |
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}, |
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}; |
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static void tl_wr942n_v1_get_mac(const char *name, char *mac) |
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{ |
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u8 *nvram = (u8 *) KSEG1ADDR(TL_WR942N_V1_DEFAULT_MAC_ADDR); |
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int err; |
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err = ath79_nvram_parse_mac_addr(nvram, TL_WR942N_V1_DEFAULT_MAC_SIZE, |
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name, mac); |
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if (err) |
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pr_err("no MAC address found for %s\n", name); |
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} |
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static void __init tl_wr942n_v1_setup(void) |
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{ |
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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u8 tmpmac[ETH_ALEN]; |
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void __iomem *base; |
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u32 t; |
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ath79_register_m25p80(NULL); |
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spi_register_board_info(tl_wr942n_v1_spi_info, |
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ARRAY_SIZE(tl_wr942n_v1_spi_info)); |
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platform_device_register(&tl_wr942n_v1_spi_device); |
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/* Check inherited UART RX GPIO definition */ |
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base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); |
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t = __raw_readl(base + QCA956X_GPIO_REG_IN_ENABLE0); |
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if (((t & GPIO_IN_ENABLE0_UART_SIN_MASK) |
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>> GPIO_IN_ENABLE0_UART_SIN_LSB) == TL_WR942N_V1_GPIO_LED_USB1) { |
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pr_warn("Active UART detected on USBLED's GPIOs!\n"); |
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tl_wr942n_v1_leds_gpio[9].gpio = TL_WR942N_V1_GPIO_UART_TX; |
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tl_wr942n_v1_leds_gpio[10].gpio = TL_WR942N_V1_GPIO_UART_RX; |
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} |
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ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr942n_v1_leds_gpio), |
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tl_wr942n_v1_leds_gpio); |
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ath79_register_gpio_keys_polled(-1, TL_WR942N_V1_KEYS_POLL_INTERVAL, |
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ARRAY_SIZE(tl_wr942n_v1_gpio_keys), |
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tl_wr942n_v1_gpio_keys); |
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tl_wr942n_v1_get_mac("MAC:", tmpmac); |
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/* swap PHYs */ |
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ath79_setup_qca956x_eth_cfg(QCA956X_ETH_CFG_SW_PHY_SWAP | |
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QCA956X_ETH_CFG_SW_PHY_ADDR_SWAP); |
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ath79_register_mdio(0, 0x0); |
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ath79_register_mdio(1, 0x0); |
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/* WAN port */ |
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ath79_init_mac(ath79_eth0_data.mac_addr, tmpmac, 1); |
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
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ath79_eth0_data.speed = SPEED_100; |
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ath79_eth0_data.duplex = DUPLEX_FULL; |
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/* swaped PHYs */ |
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ath79_eth0_data.phy_mask = BIT(0); |
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ath79_register_eth(0); |
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/* LAN ports */ |
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; |
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ath79_init_mac(ath79_eth1_data.mac_addr, tmpmac, 0); |
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ath79_eth1_data.speed = SPEED_1000; |
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ath79_eth1_data.duplex = DUPLEX_FULL; |
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/* swaped PHYs */ |
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ath79_switch_data.phy_poll_mask |= BIT(0); |
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ath79_switch_data.phy4_mii_en = 1; |
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ath79_register_eth(1); |
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ath79_register_wmac(art + TL_WR942N_V1_WMAC_CALDATA_OFFSET, tmpmac); |
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ath79_register_usb(); |
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gpio_request_one(TL_WR942N_V1_74HC_GPIO_HUB_RESET, |
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GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, |
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"USB power"); |
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gpio_request_one(TL_WR942N_V1_GPIO_SHIFT_OE, |
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GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, |
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"LED control"); |
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gpio_request_one(TL_WR942N_V1_GPIO_SHIFT_SRCLR, |
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GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, |
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"LED reset"); |
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} |
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MIPS_MACHINE(ATH79_MACH_TL_WR942N_V1, "TL-WR942N-V1", "TP-LINK TL-WR942N v1", |
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tl_wr942n_v1_setup); |
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