Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 45432master
parent
5c9c670616
commit
b5073ca2c8
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From: Hante Meuleman <meuleman@broadcom.com>
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Date: Fri, 6 Mar 2015 18:40:41 +0100
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Subject: [PATCH] brcmfmac: Fix race condition in msgbuf ioctl processing.
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Msgbuf is using a wait_event_timeout to wait for the response on
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an ioctl. The wakeup routine uses waitqueue_active to see if
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wait_event_timeout has been called. There is a chance that the
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response arrives before wait_event_timeout is called, this
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will result in situation that wait_event_timeout never gets
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woken again and assumed result will be a timeout. This patch
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removes that errornous situation by always setting the
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ctl_completed var before checking for queue active.
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Reviewed-by: Arend Van Spriel <arend@broadcom.com>
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Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com>
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Signed-off-by: Hante Meuleman <meuleman@broadcom.com>
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Signed-off-by: Arend van Spriel <arend@broadcom.com>
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Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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---
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--- a/drivers/net/wireless/brcm80211/brcmfmac/msgbuf.c
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+++ b/drivers/net/wireless/brcm80211/brcmfmac/msgbuf.c
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@@ -481,10 +481,9 @@ static int brcmf_msgbuf_ioctl_resp_wait(
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static void brcmf_msgbuf_ioctl_resp_wake(struct brcmf_msgbuf *msgbuf)
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{
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- if (waitqueue_active(&msgbuf->ioctl_resp_wait)) {
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- msgbuf->ctl_completed = true;
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+ msgbuf->ctl_completed = true;
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+ if (waitqueue_active(&msgbuf->ioctl_resp_wait))
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wake_up(&msgbuf->ioctl_resp_wait);
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- }
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}
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@ -0,0 +1,30 @@ |
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From: Hante Meuleman <meuleman@broadcom.com>
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Date: Wed, 18 Mar 2015 13:25:23 +0100
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Subject: [PATCH] brcmfmac: Update msgbuf commonring size for improved
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throughput.
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Reviewed-by: Arend Van Spriel <arend@broadcom.com>
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Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com>
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Signed-off-by: Hante Meuleman <meuleman@broadcom.com>
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Signed-off-by: Arend van Spriel <arend@broadcom.com>
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Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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---
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--- a/drivers/net/wireless/brcm80211/brcmfmac/msgbuf.h
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+++ b/drivers/net/wireless/brcm80211/brcmfmac/msgbuf.h
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@@ -17,11 +17,11 @@
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#ifdef CPTCFG_BRCMFMAC_PROTO_MSGBUF
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-#define BRCMF_H2D_MSGRING_CONTROL_SUBMIT_MAX_ITEM 20
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-#define BRCMF_H2D_MSGRING_RXPOST_SUBMIT_MAX_ITEM 256
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-#define BRCMF_D2H_MSGRING_CONTROL_COMPLETE_MAX_ITEM 20
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+#define BRCMF_H2D_MSGRING_CONTROL_SUBMIT_MAX_ITEM 64
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+#define BRCMF_H2D_MSGRING_RXPOST_SUBMIT_MAX_ITEM 512
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+#define BRCMF_D2H_MSGRING_CONTROL_COMPLETE_MAX_ITEM 64
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#define BRCMF_D2H_MSGRING_TX_COMPLETE_MAX_ITEM 1024
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-#define BRCMF_D2H_MSGRING_RX_COMPLETE_MAX_ITEM 256
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+#define BRCMF_D2H_MSGRING_RX_COMPLETE_MAX_ITEM 512
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#define BRCMF_H2D_TXFLOWRING_MAX_ITEM 512
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#define BRCMF_H2D_MSGRING_CONTROL_SUBMIT_ITEMSIZE 40
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From: Oleksij Rempel <linux@rempel-privat.de>
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Date: Sun, 22 Mar 2015 19:29:46 +0100
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Subject: [PATCH] ath9k_htc: add new WMI_REG_RMW_CMDID command
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Since usb bus add extra delay on each request, a command
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with read + write requests is too expensive. We can dramtically
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reduce usb load by moving this command to firmware.
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In my tests, this patch will reduce channel scan time
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for about 5-10 seconds.
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Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
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Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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---
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--- a/drivers/net/wireless/ath/ath.h
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+++ b/drivers/net/wireless/ath/ath.h
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@@ -131,6 +131,9 @@ struct ath_ops {
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void (*enable_write_buffer)(void *);
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void (*write_flush) (void *);
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u32 (*rmw)(void *, u32 reg_offset, u32 set, u32 clr);
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+ void (*enable_rmw_buffer)(void *);
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+ void (*rmw_flush) (void *);
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+
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};
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struct ath_common;
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--- a/drivers/net/wireless/ath/ath9k/htc.h
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+++ b/drivers/net/wireless/ath/ath9k/htc.h
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@@ -444,6 +444,10 @@ static inline void ath9k_htc_stop_btcoex
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#define OP_BT_SCAN BIT(4)
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#define OP_TSF_RESET BIT(6)
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+enum htc_op_flags {
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+ HTC_FWFLAG_NO_RMW,
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+};
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+
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struct ath9k_htc_priv {
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struct device *dev;
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struct ieee80211_hw *hw;
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@@ -482,6 +486,7 @@ struct ath9k_htc_priv {
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bool reconfig_beacon;
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unsigned int rxfilter;
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unsigned long op_flags;
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+ unsigned long fw_flags;
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struct ath9k_hw_cal_data caldata;
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struct ath_spec_scan_priv spec_priv;
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--- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c
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+++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
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@@ -376,17 +376,139 @@ static void ath9k_regwrite_flush(void *h
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mutex_unlock(&priv->wmi->multi_write_mutex);
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}
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-static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
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+static void ath9k_reg_rmw_buffer(void *hw_priv,
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+ u32 reg_offset, u32 set, u32 clr)
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+{
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+ struct ath_hw *ah = (struct ath_hw *) hw_priv;
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+ struct ath_common *common = ath9k_hw_common(ah);
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+ struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
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+ u32 rsp_status;
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+ int r;
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+
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+ mutex_lock(&priv->wmi->multi_rmw_mutex);
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+
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+ /* Store the register/value */
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+ priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].reg =
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+ cpu_to_be32(reg_offset);
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+ priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].set =
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+ cpu_to_be32(set);
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+ priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].clr =
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+ cpu_to_be32(clr);
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+
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+ priv->wmi->multi_rmw_idx++;
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+
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+ /* If the buffer is full, send it out. */
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+ if (priv->wmi->multi_rmw_idx == MAX_RMW_CMD_NUMBER) {
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+ r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
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+ (u8 *) &priv->wmi->multi_rmw,
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+ sizeof(struct register_write) * priv->wmi->multi_rmw_idx,
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+ (u8 *) &rsp_status, sizeof(rsp_status),
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+ 100);
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+ if (unlikely(r)) {
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+ ath_dbg(common, WMI,
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+ "REGISTER RMW FAILED, multi len: %d\n",
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+ priv->wmi->multi_rmw_idx);
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+ }
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+ priv->wmi->multi_rmw_idx = 0;
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+ }
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+
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+ mutex_unlock(&priv->wmi->multi_rmw_mutex);
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+}
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+
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+static void ath9k_reg_rmw_flush(void *hw_priv)
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{
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- u32 val;
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+ struct ath_hw *ah = (struct ath_hw *) hw_priv;
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+ struct ath_common *common = ath9k_hw_common(ah);
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+ struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
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+ u32 rsp_status;
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+ int r;
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+
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+ if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags))
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+ return;
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+
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+ atomic_dec(&priv->wmi->m_rmw_cnt);
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+
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+ mutex_lock(&priv->wmi->multi_rmw_mutex);
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+
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+ if (priv->wmi->multi_rmw_idx) {
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+ r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
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+ (u8 *) &priv->wmi->multi_rmw,
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+ sizeof(struct register_rmw) * priv->wmi->multi_rmw_idx,
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+ (u8 *) &rsp_status, sizeof(rsp_status),
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+ 100);
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+ if (unlikely(r)) {
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+ ath_dbg(common, WMI,
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+ "REGISTER RMW FAILED, multi len: %d\n",
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+ priv->wmi->multi_rmw_idx);
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+ }
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+ priv->wmi->multi_rmw_idx = 0;
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+ }
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+
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+ mutex_unlock(&priv->wmi->multi_rmw_mutex);
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+}
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+
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+static void ath9k_enable_rmw_buffer(void *hw_priv)
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+{
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+ struct ath_hw *ah = (struct ath_hw *) hw_priv;
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+ struct ath_common *common = ath9k_hw_common(ah);
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+ struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
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+
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+ if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags))
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+ return;
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- val = ath9k_regread(hw_priv, reg_offset);
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- val &= ~clr;
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- val |= set;
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- ath9k_regwrite(hw_priv, val, reg_offset);
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+ atomic_inc(&priv->wmi->m_rmw_cnt);
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+}
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+
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+static u32 ath9k_reg_rmw_single(void *hw_priv,
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+ u32 reg_offset, u32 set, u32 clr)
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+{
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+ struct ath_hw *ah = (struct ath_hw *) hw_priv;
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+ struct ath_common *common = ath9k_hw_common(ah);
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+ struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
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+ struct register_rmw buf, buf_ret;
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+ int ret;
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+ u32 val = 0;
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+
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+ buf.reg = cpu_to_be32(reg_offset);
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+ buf.set = cpu_to_be32(set);
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+ buf.clr = cpu_to_be32(clr);
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+
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+ ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
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+ (u8 *) &buf, sizeof(buf),
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+ (u8 *) &buf_ret, sizeof(buf_ret),
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+ 100);
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+ if (unlikely(ret)) {
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+ ath_dbg(common, WMI, "REGISTER RMW FAILED:(0x%04x, %d)\n",
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+ reg_offset, ret);
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+ }
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return val;
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}
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+static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
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+{
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+ struct ath_hw *ah = (struct ath_hw *) hw_priv;
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+ struct ath_common *common = ath9k_hw_common(ah);
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+ struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
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+
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+ if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags)) {
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+ u32 val;
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+
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+ val = REG_READ(ah, reg_offset);
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+ val &= ~clr;
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+ val |= set;
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+ REG_WRITE(ah, reg_offset, val);
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+
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+ return 0;
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+ }
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+
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+ if (atomic_read(&priv->wmi->m_rmw_cnt))
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+ ath9k_reg_rmw_buffer(hw_priv, reg_offset, set, clr);
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+ else
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+ ath9k_reg_rmw_single(hw_priv, reg_offset, set, clr);
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+
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+ return 0;
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+}
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+
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static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
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{
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*csz = L1_CACHE_BYTES >> 2;
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@@ -501,6 +623,8 @@ static int ath9k_init_priv(struct ath9k_
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ah->reg_ops.write = ath9k_regwrite;
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ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer;
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ah->reg_ops.write_flush = ath9k_regwrite_flush;
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+ ah->reg_ops.enable_rmw_buffer = ath9k_enable_rmw_buffer;
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+ ah->reg_ops.rmw_flush = ath9k_reg_rmw_flush;
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ah->reg_ops.rmw = ath9k_reg_rmw;
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priv->ah = ah;
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@@ -686,6 +810,12 @@ static int ath9k_init_firmware_version(s
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return -EINVAL;
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}
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+ if (priv->fw_version_major == 1 && priv->fw_version_minor < 4)
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+ set_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags);
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+
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+ dev_info(priv->dev, "FW RMW support: %s\n",
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+ test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags) ? "Off" : "On");
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+
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return 0;
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}
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--- a/drivers/net/wireless/ath/ath9k/hw.h
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+++ b/drivers/net/wireless/ath/ath9k/hw.h
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@@ -100,6 +100,18 @@
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(_ah)->reg_ops.write_flush((_ah)); \
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} while (0)
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+#define ENABLE_REG_RMW_BUFFER(_ah) \
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+ do { \
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+ if ((_ah)->reg_ops.enable_rmw_buffer) \
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+ (_ah)->reg_ops.enable_rmw_buffer((_ah)); \
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+ } while (0)
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+
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+#define REG_RMW_BUFFER_FLUSH(_ah) \
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+ do { \
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+ if ((_ah)->reg_ops.rmw_flush) \
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+ (_ah)->reg_ops.rmw_flush((_ah)); \
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+ } while (0)
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+
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#define PR_EEP(_s, _val) \
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do { \
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len += scnprintf(buf + len, size - len, "%20s : %10d\n",\
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--- a/drivers/net/wireless/ath/ath9k/wmi.c
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+++ b/drivers/net/wireless/ath/ath9k/wmi.c
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@@ -61,6 +61,8 @@ static const char *wmi_cmd_to_name(enum
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return "WMI_REG_READ_CMDID";
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case WMI_REG_WRITE_CMDID:
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return "WMI_REG_WRITE_CMDID";
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+ case WMI_REG_RMW_CMDID:
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+ return "WMI_REG_RMW_CMDID";
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case WMI_RC_STATE_CHANGE_CMDID:
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return "WMI_RC_STATE_CHANGE_CMDID";
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case WMI_RC_RATE_UPDATE_CMDID:
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@@ -101,6 +103,7 @@ struct wmi *ath9k_init_wmi(struct ath9k_
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spin_lock_init(&wmi->event_lock);
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mutex_init(&wmi->op_mutex);
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mutex_init(&wmi->multi_write_mutex);
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+ mutex_init(&wmi->multi_rmw_mutex);
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init_completion(&wmi->cmd_wait);
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||||||
|
INIT_LIST_HEAD(&wmi->pending_tx_events);
|
||||||
|
tasklet_init(&wmi->wmi_event_tasklet, ath9k_wmi_event_tasklet,
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/wmi.h
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/wmi.h
|
||||||
|
@@ -112,6 +112,7 @@ enum wmi_cmd_id {
|
||||||
|
WMI_TX_STATS_CMDID,
|
||||||
|
WMI_RX_STATS_CMDID,
|
||||||
|
WMI_BITRATE_MASK_CMDID,
|
||||||
|
+ WMI_REG_RMW_CMDID,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum wmi_event_id {
|
||||||
|
@@ -125,12 +126,19 @@ enum wmi_event_id {
|
||||||
|
};
|
||||||
|
|
||||||
|
#define MAX_CMD_NUMBER 62
|
||||||
|
+#define MAX_RMW_CMD_NUMBER 15
|
||||||
|
|
||||||
|
struct register_write {
|
||||||
|
__be32 reg;
|
||||||
|
__be32 val;
|
||||||
|
};
|
||||||
|
|
||||||
|
+struct register_rmw {
|
||||||
|
+ __be32 reg;
|
||||||
|
+ __be32 set;
|
||||||
|
+ __be32 clr;
|
||||||
|
+} __packed;
|
||||||
|
+
|
||||||
|
struct ath9k_htc_tx_event {
|
||||||
|
int count;
|
||||||
|
struct __wmi_event_txstatus txs;
|
||||||
|
@@ -156,10 +164,18 @@ struct wmi {
|
||||||
|
|
||||||
|
spinlock_t wmi_lock;
|
||||||
|
|
||||||
|
+ /* multi write section */
|
||||||
|
atomic_t mwrite_cnt;
|
||||||
|
struct register_write multi_write[MAX_CMD_NUMBER];
|
||||||
|
u32 multi_write_idx;
|
||||||
|
struct mutex multi_write_mutex;
|
||||||
|
+
|
||||||
|
+ /* multi rmw section */
|
||||||
|
+ atomic_t m_rmw_cnt;
|
||||||
|
+ struct register_rmw multi_rmw[MAX_RMW_CMD_NUMBER];
|
||||||
|
+ u32 multi_rmw_idx;
|
||||||
|
+ struct mutex multi_rmw_mutex;
|
||||||
|
+
|
||||||
|
};
|
||||||
|
|
||||||
|
struct wmi *ath9k_init_wmi(struct ath9k_htc_priv *priv);
|
@ -0,0 +1,89 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:29:47 +0100
|
||||||
|
Subject: [PATCH] ath9k: ar9271_hw_pa_cal - use defs instead of magin
|
||||||
|
numbers
|
||||||
|
|
||||||
|
This function uses mixed styles for register names/numbers which
|
||||||
|
is make harder reading and optimisation.
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
|
||||||
|
@@ -430,22 +430,22 @@ static void ar9271_hw_pa_cal(struct ath_
|
||||||
|
u32 regVal;
|
||||||
|
unsigned int i;
|
||||||
|
u32 regList[][2] = {
|
||||||
|
- { 0x786c, 0 },
|
||||||
|
- { 0x7854, 0 },
|
||||||
|
- { 0x7820, 0 },
|
||||||
|
- { 0x7824, 0 },
|
||||||
|
- { 0x7868, 0 },
|
||||||
|
- { 0x783c, 0 },
|
||||||
|
- { 0x7838, 0 } ,
|
||||||
|
- { 0x7828, 0 } ,
|
||||||
|
+ { AR9285_AN_TOP3, 0 },
|
||||||
|
+ { AR9285_AN_RXTXBB1, 0 },
|
||||||
|
+ { AR9285_AN_RF2G1, 0 },
|
||||||
|
+ { AR9285_AN_RF2G2, 0 },
|
||||||
|
+ { AR9285_AN_TOP2, 0 },
|
||||||
|
+ { AR9285_AN_RF2G8, 0 },
|
||||||
|
+ { AR9285_AN_RF2G7, 0 } ,
|
||||||
|
+ { AR9285_AN_RF2G3, 0 } ,
|
||||||
|
};
|
||||||
|
|
||||||
|
for (i = 0; i < ARRAY_SIZE(regList); i++)
|
||||||
|
regList[i][1] = REG_READ(ah, regList[i][0]);
|
||||||
|
|
||||||
|
- regVal = REG_READ(ah, 0x7834);
|
||||||
|
+ regVal = REG_READ(ah, AR9285_AN_RF2G6);
|
||||||
|
regVal &= (~(0x1));
|
||||||
|
- REG_WRITE(ah, 0x7834, regVal);
|
||||||
|
+ REG_WRITE(ah, AR9285_AN_RF2G6, regVal);
|
||||||
|
regVal = REG_READ(ah, 0x9808);
|
||||||
|
regVal |= (0x1 << 27);
|
||||||
|
REG_WRITE(ah, 0x9808, regVal);
|
||||||
|
@@ -477,7 +477,7 @@ static void ar9271_hw_pa_cal(struct ath_
|
||||||
|
* does not matter since we turn it off
|
||||||
|
*/
|
||||||
|
REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PADRVGN2TAB0, 0);
|
||||||
|
-
|
||||||
|
+ /* 7828, b0-11, ccom=fff */
|
||||||
|
REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9271_AN_RF2G3_CCOMP, 0xfff);
|
||||||
|
|
||||||
|
/* Set:
|
||||||
|
@@ -490,15 +490,16 @@ static void ar9271_hw_pa_cal(struct ath_
|
||||||
|
|
||||||
|
/* find off_6_1; */
|
||||||
|
for (i = 6; i > 0; i--) {
|
||||||
|
- regVal = REG_READ(ah, 0x7834);
|
||||||
|
+ regVal = REG_READ(ah, AR9285_AN_RF2G6);
|
||||||
|
regVal |= (1 << (20 + i));
|
||||||
|
- REG_WRITE(ah, 0x7834, regVal);
|
||||||
|
+ REG_WRITE(ah, AR9285_AN_RF2G6, regVal);
|
||||||
|
udelay(1);
|
||||||
|
/* regVal = REG_READ(ah, 0x7834); */
|
||||||
|
regVal &= (~(0x1 << (20 + i)));
|
||||||
|
- regVal |= (MS(REG_READ(ah, 0x7840), AR9285_AN_RXTXBB1_SPARE9)
|
||||||
|
+ regVal |= (MS(REG_READ(ah, AR9285_AN_RF2G9),
|
||||||
|
+ AR9285_AN_RXTXBB1_SPARE9)
|
||||||
|
<< (20 + i));
|
||||||
|
- REG_WRITE(ah, 0x7834, regVal);
|
||||||
|
+ REG_WRITE(ah, AR9285_AN_RF2G6, regVal);
|
||||||
|
}
|
||||||
|
|
||||||
|
regVal = (regVal >> 20) & 0x7f;
|
||||||
|
@@ -517,9 +518,9 @@ static void ar9271_hw_pa_cal(struct ath_
|
||||||
|
|
||||||
|
ENABLE_REGWRITE_BUFFER(ah);
|
||||||
|
|
||||||
|
- regVal = REG_READ(ah, 0x7834);
|
||||||
|
+ regVal = REG_READ(ah, AR_AN_RF2G1_CH1);
|
||||||
|
regVal |= 0x1;
|
||||||
|
- REG_WRITE(ah, 0x7834, regVal);
|
||||||
|
+ REG_WRITE(ah, AR_AN_RF2G1_CH1, regVal);
|
||||||
|
regVal = REG_READ(ah, 0x9808);
|
||||||
|
regVal &= (~(0x1 << 27));
|
||||||
|
REG_WRITE(ah, 0x9808, regVal);
|
@ -0,0 +1,79 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:29:48 +0100
|
||||||
|
Subject: [PATCH] ath9k: ar9271_hw_pa_cal: use proper makroses.
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
|
||||||
|
@@ -443,33 +443,30 @@ static void ar9271_hw_pa_cal(struct ath_
|
||||||
|
for (i = 0; i < ARRAY_SIZE(regList); i++)
|
||||||
|
regList[i][1] = REG_READ(ah, regList[i][0]);
|
||||||
|
|
||||||
|
- regVal = REG_READ(ah, AR9285_AN_RF2G6);
|
||||||
|
- regVal &= (~(0x1));
|
||||||
|
- REG_WRITE(ah, AR9285_AN_RF2G6, regVal);
|
||||||
|
- regVal = REG_READ(ah, 0x9808);
|
||||||
|
- regVal |= (0x1 << 27);
|
||||||
|
- REG_WRITE(ah, 0x9808, regVal);
|
||||||
|
-
|
||||||
|
+ /* 7834, b1=0 */
|
||||||
|
+ REG_CLR_BIT(ah, AR9285_AN_RF2G6, 1 << 0);
|
||||||
|
+ /* 9808, b27=1 */
|
||||||
|
+ REG_SET_BIT(ah, 0x9808, 1 << 27);
|
||||||
|
/* 786c,b23,1, pwddac=1 */
|
||||||
|
- REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1);
|
||||||
|
+ REG_SET_BIT(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC);
|
||||||
|
/* 7854, b5,1, pdrxtxbb=1 */
|
||||||
|
- REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1);
|
||||||
|
+ REG_SET_BIT(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1);
|
||||||
|
/* 7854, b7,1, pdv2i=1 */
|
||||||
|
- REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1);
|
||||||
|
+ REG_SET_BIT(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I);
|
||||||
|
/* 7854, b8,1, pddacinterface=1 */
|
||||||
|
- REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF, 1);
|
||||||
|
+ REG_SET_BIT(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF);
|
||||||
|
/* 7824,b12,0, offcal=0 */
|
||||||
|
- REG_RMW_FIELD(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL, 0);
|
||||||
|
+ REG_CLR_BIT(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL);
|
||||||
|
/* 7838, b1,0, pwddb=0 */
|
||||||
|
- REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB, 0);
|
||||||
|
+ REG_CLR_BIT(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB);
|
||||||
|
/* 7820,b11,0, enpacal=0 */
|
||||||
|
- REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL, 0);
|
||||||
|
+ REG_CLR_BIT(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL);
|
||||||
|
/* 7820,b25,1, pdpadrv1=0 */
|
||||||
|
- REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1, 0);
|
||||||
|
+ REG_CLR_BIT(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1);
|
||||||
|
/* 7820,b24,0, pdpadrv2=0 */
|
||||||
|
- REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV2, 0);
|
||||||
|
+ REG_CLR_BIT(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV2);
|
||||||
|
/* 7820,b23,0, pdpaout=0 */
|
||||||
|
- REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT, 0);
|
||||||
|
+ REG_CLR_BIT(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT);
|
||||||
|
/* 783c,b14-16,7, padrvgn2tab_0=7 */
|
||||||
|
REG_RMW_FIELD(ah, AR9285_AN_RF2G8, AR9285_AN_RF2G8_PADRVGN2TAB0, 7);
|
||||||
|
/*
|
||||||
|
@@ -516,15 +513,13 @@ static void ar9271_hw_pa_cal(struct ath_
|
||||||
|
ah->pacal_info.prev_offset = regVal;
|
||||||
|
}
|
||||||
|
|
||||||
|
- ENABLE_REGWRITE_BUFFER(ah);
|
||||||
|
|
||||||
|
- regVal = REG_READ(ah, AR_AN_RF2G1_CH1);
|
||||||
|
- regVal |= 0x1;
|
||||||
|
- REG_WRITE(ah, AR_AN_RF2G1_CH1, regVal);
|
||||||
|
- regVal = REG_READ(ah, 0x9808);
|
||||||
|
- regVal &= (~(0x1 << 27));
|
||||||
|
- REG_WRITE(ah, 0x9808, regVal);
|
||||||
|
+ /* 7834, b1=1 */
|
||||||
|
+ REG_SET_BIT(ah, AR9285_AN_RF2G6, 1 << 0);
|
||||||
|
+ /* 9808, b27=0 */
|
||||||
|
+ REG_CLR_BIT(ah, 0x9808, 1 << 27);
|
||||||
|
|
||||||
|
+ ENABLE_REGWRITE_BUFFER(ah);
|
||||||
|
for (i = 0; i < ARRAY_SIZE(regList); i++)
|
||||||
|
REG_WRITE(ah, regList[i][0], regList[i][1]);
|
||||||
|
|
@ -0,0 +1,48 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:29:49 +0100
|
||||||
|
Subject: [PATCH] ath9k: ar9271_hw_pa_cal: use RMW buffer
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
|
||||||
|
@@ -436,13 +436,14 @@ static void ar9271_hw_pa_cal(struct ath_
|
||||||
|
{ AR9285_AN_RF2G2, 0 },
|
||||||
|
{ AR9285_AN_TOP2, 0 },
|
||||||
|
{ AR9285_AN_RF2G8, 0 },
|
||||||
|
- { AR9285_AN_RF2G7, 0 } ,
|
||||||
|
- { AR9285_AN_RF2G3, 0 } ,
|
||||||
|
+ { AR9285_AN_RF2G7, 0 },
|
||||||
|
+ { AR9285_AN_RF2G3, 0 },
|
||||||
|
};
|
||||||
|
|
||||||
|
for (i = 0; i < ARRAY_SIZE(regList); i++)
|
||||||
|
regList[i][1] = REG_READ(ah, regList[i][0]);
|
||||||
|
|
||||||
|
+ ENABLE_REG_RMW_BUFFER(ah);
|
||||||
|
/* 7834, b1=0 */
|
||||||
|
REG_CLR_BIT(ah, AR9285_AN_RF2G6, 1 << 0);
|
||||||
|
/* 9808, b27=1 */
|
||||||
|
@@ -476,6 +477,7 @@ static void ar9271_hw_pa_cal(struct ath_
|
||||||
|
REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PADRVGN2TAB0, 0);
|
||||||
|
/* 7828, b0-11, ccom=fff */
|
||||||
|
REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9271_AN_RF2G3_CCOMP, 0xfff);
|
||||||
|
+ REG_RMW_BUFFER_FLUSH(ah);
|
||||||
|
|
||||||
|
/* Set:
|
||||||
|
* localmode=1,bmode=1,bmoderxtx=1,synthon=1,
|
||||||
|
@@ -514,10 +516,12 @@ static void ar9271_hw_pa_cal(struct ath_
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
+ ENABLE_REG_RMW_BUFFER(ah);
|
||||||
|
/* 7834, b1=1 */
|
||||||
|
REG_SET_BIT(ah, AR9285_AN_RF2G6, 1 << 0);
|
||||||
|
/* 9808, b27=0 */
|
||||||
|
REG_CLR_BIT(ah, 0x9808, 1 << 27);
|
||||||
|
+ REG_RMW_BUFFER_FLUSH(ah);
|
||||||
|
|
||||||
|
ENABLE_REGWRITE_BUFFER(ah);
|
||||||
|
for (i = 0; i < ARRAY_SIZE(regList); i++)
|
@ -0,0 +1,35 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:29:50 +0100
|
||||||
|
Subject: [PATCH] ath9k: add multi_read to be compatible with ath9k_htc
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/init.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/init.c
|
||||||
|
@@ -141,6 +141,16 @@ static unsigned int ath9k_ioread32(void
|
||||||
|
return val;
|
||||||
|
}
|
||||||
|
|
||||||
|
+static void ath9k_multi_ioread32(void *hw_priv, u32 *addr,
|
||||||
|
+ u32 *val, u16 count)
|
||||||
|
+{
|
||||||
|
+ int i;
|
||||||
|
+
|
||||||
|
+ for (i = 0; i < count; i++)
|
||||||
|
+ val[i] = ath9k_ioread32(hw_priv, addr[i]);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+
|
||||||
|
static unsigned int __ath9k_reg_rmw(struct ath_softc *sc, u32 reg_offset,
|
||||||
|
u32 set, u32 clr)
|
||||||
|
{
|
||||||
|
@@ -530,6 +540,7 @@ static int ath9k_init_softc(u16 devid, s
|
||||||
|
ah->hw = sc->hw;
|
||||||
|
ah->hw_version.devid = devid;
|
||||||
|
ah->reg_ops.read = ath9k_ioread32;
|
||||||
|
+ ah->reg_ops.multi_read = ath9k_multi_ioread32;
|
||||||
|
ah->reg_ops.write = ath9k_iowrite32;
|
||||||
|
ah->reg_ops.rmw = ath9k_reg_rmw;
|
||||||
|
pCap = &ah->caps;
|
@ -0,0 +1,69 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:29:51 +0100
|
||||||
|
Subject: [PATCH] ath9k: add new function ath9k_hw_read_array
|
||||||
|
|
||||||
|
REG_READ generate most overhead on usb bus. It send and read micro packages
|
||||||
|
and reduce usb bandwidth. To reduce this overhead we should read in batches.
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/hw.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/hw.c
|
||||||
|
@@ -121,6 +121,36 @@ void ath9k_hw_write_array(struct ath_hw
|
||||||
|
REGWRITE_BUFFER_FLUSH(ah);
|
||||||
|
}
|
||||||
|
|
||||||
|
+void ath9k_hw_read_array(struct ath_hw *ah, u32 array[][2], int size)
|
||||||
|
+{
|
||||||
|
+ u32 *tmp_reg_list, *tmp_data;
|
||||||
|
+ int i;
|
||||||
|
+
|
||||||
|
+ tmp_reg_list = kmalloc(size * sizeof(u32), GFP_KERNEL);
|
||||||
|
+ if (!tmp_reg_list) {
|
||||||
|
+ dev_err(ah->dev, "%s: tmp_reg_list: alloc filed\n", __func__);
|
||||||
|
+ return;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ tmp_data = kmalloc(size * sizeof(u32), GFP_KERNEL);
|
||||||
|
+ if (!tmp_data) {
|
||||||
|
+ dev_err(ah->dev, "%s tmp_data: alloc filed\n", __func__);
|
||||||
|
+ goto error_tmp_data;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ for (i = 0; i < size; i++)
|
||||||
|
+ tmp_reg_list[i] = array[i][0];
|
||||||
|
+
|
||||||
|
+ REG_READ_MULTI(ah, tmp_reg_list, tmp_data, size);
|
||||||
|
+
|
||||||
|
+ for (i = 0; i < size; i++)
|
||||||
|
+ array[i][1] = tmp_data[i];
|
||||||
|
+
|
||||||
|
+ kfree(tmp_data);
|
||||||
|
+error_tmp_data:
|
||||||
|
+ kfree(tmp_reg_list);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
u32 ath9k_hw_reverse_bits(u32 val, u32 n)
|
||||||
|
{
|
||||||
|
u32 retval;
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/hw.h
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/hw.h
|
||||||
|
@@ -138,6 +138,8 @@
|
||||||
|
|
||||||
|
#define REG_WRITE_ARRAY(iniarray, column, regWr) \
|
||||||
|
ath9k_hw_write_array(ah, iniarray, column, &(regWr))
|
||||||
|
+#define REG_READ_ARRAY(ah, array, size) \
|
||||||
|
+ ath9k_hw_read_array(ah, array, size)
|
||||||
|
|
||||||
|
#define AR_GPIO_OUTPUT_MUX_AS_OUTPUT 0
|
||||||
|
#define AR_GPIO_OUTPUT_MUX_AS_PCIE_ATTENTION_LED 1
|
||||||
|
@@ -1020,6 +1022,7 @@ void ath9k_hw_synth_delay(struct ath_hw
|
||||||
|
bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);
|
||||||
|
void ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array,
|
||||||
|
int column, unsigned int *writecnt);
|
||||||
|
+void ath9k_hw_read_array(struct ath_hw *ah, u32 array[][2], int size);
|
||||||
|
u32 ath9k_hw_reverse_bits(u32 val, u32 n);
|
||||||
|
u16 ath9k_hw_computetxtime(struct ath_hw *ah,
|
||||||
|
u8 phy, int kbps,
|
@ -0,0 +1,24 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:29:52 +0100
|
||||||
|
Subject: [PATCH] ath9k: ar9271_hw_pa_cal: use REG_READ_ARRAY
|
||||||
|
|
||||||
|
insted of reading each register separatly
|
||||||
|
and waste 4ms on each operation, we can
|
||||||
|
use one shot read.
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
|
||||||
|
@@ -440,8 +440,7 @@ static void ar9271_hw_pa_cal(struct ath_
|
||||||
|
{ AR9285_AN_RF2G3, 0 },
|
||||||
|
};
|
||||||
|
|
||||||
|
- for (i = 0; i < ARRAY_SIZE(regList); i++)
|
||||||
|
- regList[i][1] = REG_READ(ah, regList[i][0]);
|
||||||
|
+ REG_READ_ARRAY(ah, regList, ARRAY_SIZE(regList));
|
||||||
|
|
||||||
|
ENABLE_REG_RMW_BUFFER(ah);
|
||||||
|
/* 7834, b1=0 */
|
@ -0,0 +1,39 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:29:53 +0100
|
||||||
|
Subject: [PATCH] ath9k: use one shot read in ath9k_hw_update_mibstats
|
||||||
|
|
||||||
|
this will reduce some overhead on usb bus.
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/ani.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/ani.c
|
||||||
|
@@ -107,11 +107,21 @@ static const struct ani_cck_level_entry
|
||||||
|
static void ath9k_hw_update_mibstats(struct ath_hw *ah,
|
||||||
|
struct ath9k_mib_stats *stats)
|
||||||
|
{
|
||||||
|
- stats->ackrcv_bad += REG_READ(ah, AR_ACK_FAIL);
|
||||||
|
- stats->rts_bad += REG_READ(ah, AR_RTS_FAIL);
|
||||||
|
- stats->fcs_bad += REG_READ(ah, AR_FCS_FAIL);
|
||||||
|
- stats->rts_good += REG_READ(ah, AR_RTS_OK);
|
||||||
|
- stats->beacons += REG_READ(ah, AR_BEACON_CNT);
|
||||||
|
+ u32 addr[5] = {AR_RTS_OK, AR_RTS_FAIL, AR_ACK_FAIL,
|
||||||
|
+ AR_FCS_FAIL, AR_BEACON_CNT};
|
||||||
|
+ u32 data[5];
|
||||||
|
+
|
||||||
|
+ REG_READ_MULTI(ah, &addr[0], &data[0], 5);
|
||||||
|
+ /* AR_RTS_OK */
|
||||||
|
+ stats->rts_good += data[0];
|
||||||
|
+ /* AR_RTS_FAIL */
|
||||||
|
+ stats->rts_bad += data[1];
|
||||||
|
+ /* AR_ACK_FAIL */
|
||||||
|
+ stats->ackrcv_bad += data[2];
|
||||||
|
+ /* AR_FCS_FAIL */
|
||||||
|
+ stats->fcs_bad += data[3];
|
||||||
|
+ /* AR_BEACON_CNT */
|
||||||
|
+ stats->beacons += data[4];
|
||||||
|
}
|
||||||
|
|
||||||
|
static void ath9k_ani_restart(struct ath_hw *ah)
|
@ -0,0 +1,71 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:29:54 +0100
|
||||||
|
Subject: [PATCH] ath9k: ath9k_hw_loadnf: use REG_RMW
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/calib.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/calib.c
|
||||||
|
@@ -238,7 +238,6 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
|
||||||
|
{
|
||||||
|
struct ath9k_nfcal_hist *h = NULL;
|
||||||
|
unsigned i, j;
|
||||||
|
- int32_t val;
|
||||||
|
u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
|
||||||
|
struct ath_common *common = ath9k_hw_common(ah);
|
||||||
|
s16 default_nf = ath9k_hw_get_default_nf(ah, chan);
|
||||||
|
@@ -246,6 +245,7 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
|
||||||
|
if (ah->caldata)
|
||||||
|
h = ah->caldata->nfCalHist;
|
||||||
|
|
||||||
|
+ ENABLE_REG_RMW_BUFFER(ah);
|
||||||
|
for (i = 0; i < NUM_NF_READINGS; i++) {
|
||||||
|
if (chainmask & (1 << i)) {
|
||||||
|
s16 nfval;
|
||||||
|
@@ -258,10 +258,8 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
|
||||||
|
else
|
||||||
|
nfval = default_nf;
|
||||||
|
|
||||||
|
- val = REG_READ(ah, ah->nf_regs[i]);
|
||||||
|
- val &= 0xFFFFFE00;
|
||||||
|
- val |= (((u32) nfval << 1) & 0x1ff);
|
||||||
|
- REG_WRITE(ah, ah->nf_regs[i], val);
|
||||||
|
+ REG_RMW(ah, ah->nf_regs[i],
|
||||||
|
+ (((u32) nfval << 1) & 0x1ff), 0x1ff);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -274,6 +272,7 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
|
||||||
|
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
|
||||||
|
AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
|
||||||
|
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
|
||||||
|
+ REG_RMW_BUFFER_FLUSH(ah);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Wait for load to complete, should be fast, a few 10s of us.
|
||||||
|
@@ -309,19 +308,17 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
|
||||||
|
* by the median we just loaded. This will be initial (and max) value
|
||||||
|
* of next noise floor calibration the baseband does.
|
||||||
|
*/
|
||||||
|
- ENABLE_REGWRITE_BUFFER(ah);
|
||||||
|
+ ENABLE_REG_RMW_BUFFER(ah);
|
||||||
|
for (i = 0; i < NUM_NF_READINGS; i++) {
|
||||||
|
if (chainmask & (1 << i)) {
|
||||||
|
if ((i >= AR5416_MAX_CHAINS) && !IS_CHAN_HT40(chan))
|
||||||
|
continue;
|
||||||
|
|
||||||
|
- val = REG_READ(ah, ah->nf_regs[i]);
|
||||||
|
- val &= 0xFFFFFE00;
|
||||||
|
- val |= (((u32) (-50) << 1) & 0x1ff);
|
||||||
|
- REG_WRITE(ah, ah->nf_regs[i], val);
|
||||||
|
+ REG_RMW(ah, ah->nf_regs[i],
|
||||||
|
+ (((u32) (-50) << 1) & 0x1ff), 0x1ff);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
- REGWRITE_BUFFER_FLUSH(ah);
|
||||||
|
+ REG_RMW_BUFFER_FLUSH(ah);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
@ -0,0 +1,27 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:29:55 +0100
|
||||||
|
Subject: [PATCH] ath9k: write buffer related optimisation in
|
||||||
|
ar5008_hw_set_channel_regs
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
|
||||||
|
@@ -681,12 +681,13 @@ static void ar5008_hw_set_channel_regs(s
|
||||||
|
phymode |= AR_PHY_FC_DYN2040_PRI_CH;
|
||||||
|
|
||||||
|
}
|
||||||
|
+ ENABLE_REGWRITE_BUFFER(ah);
|
||||||
|
REG_WRITE(ah, AR_PHY_TURBO, phymode);
|
||||||
|
|
||||||
|
+ /* This function do only REG_WRITE, so
|
||||||
|
+ * we can include it to REGWRITE_BUFFER. */
|
||||||
|
ath9k_hw_set11nmac2040(ah, chan);
|
||||||
|
|
||||||
|
- ENABLE_REGWRITE_BUFFER(ah);
|
||||||
|
-
|
||||||
|
REG_WRITE(ah, AR_GTXTO, 25 << AR_GTXTO_TIMEOUT_LIMIT_S);
|
||||||
|
REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S);
|
||||||
|
|
@ -0,0 +1,26 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:29:56 +0100
|
||||||
|
Subject: [PATCH] ath9k: ath9k_hw_set_4k_power_cal_tabl: use rmw buffer
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
|
||||||
|
@@ -389,6 +389,7 @@ static void ath9k_hw_set_4k_power_cal_ta
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
+ ENABLE_REG_RMW_BUFFER(ah);
|
||||||
|
REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
|
||||||
|
(numXpdGain - 1) & 0x3);
|
||||||
|
REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1,
|
||||||
|
@@ -396,6 +397,7 @@ static void ath9k_hw_set_4k_power_cal_ta
|
||||||
|
REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2,
|
||||||
|
xpdGainValues[1]);
|
||||||
|
REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, 0);
|
||||||
|
+ REG_RMW_BUFFER_FLUSH(ah);
|
||||||
|
|
||||||
|
for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) {
|
||||||
|
regChainOffset = i * 0x1000;
|
@ -0,0 +1,43 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:29:57 +0100
|
||||||
|
Subject: [PATCH] ath9k: use rmw buffer in ath9k_hw_set_operating_mode
|
||||||
|
and ath9k_hw_reset
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/hw.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/hw.c
|
||||||
|
@@ -1227,6 +1227,7 @@ static void ath9k_hw_set_operating_mode(
|
||||||
|
u32 mask = AR_STA_ID1_STA_AP | AR_STA_ID1_ADHOC;
|
||||||
|
u32 set = AR_STA_ID1_KSRCH_MODE;
|
||||||
|
|
||||||
|
+ ENABLE_REG_RMW_BUFFER(ah);
|
||||||
|
switch (opmode) {
|
||||||
|
case NL80211_IFTYPE_ADHOC:
|
||||||
|
if (!AR_SREV_9340_13(ah)) {
|
||||||
|
@@ -1248,6 +1249,7 @@ static void ath9k_hw_set_operating_mode(
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
REG_RMW(ah, AR_STA_ID1, set, mask);
|
||||||
|
+ REG_RMW_BUFFER_FLUSH(ah);
|
||||||
|
}
|
||||||
|
|
||||||
|
void ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled,
|
||||||
|
@@ -1960,6 +1962,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
|
||||||
|
if (!ath9k_hw_mci_is_enabled(ah))
|
||||||
|
REG_WRITE(ah, AR_OBS, 8);
|
||||||
|
|
||||||
|
+ ENABLE_REG_RMW_BUFFER(ah);
|
||||||
|
if (ah->config.rx_intr_mitigation) {
|
||||||
|
REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, ah->config.rimt_last);
|
||||||
|
REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, ah->config.rimt_first);
|
||||||
|
@@ -1969,6 +1972,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
|
||||||
|
REG_RMW_FIELD(ah, AR_TIMT, AR_TIMT_LAST, 300);
|
||||||
|
REG_RMW_FIELD(ah, AR_TIMT, AR_TIMT_FIRST, 750);
|
||||||
|
}
|
||||||
|
+ REG_RMW_BUFFER_FLUSH(ah);
|
||||||
|
|
||||||
|
ath9k_hw_init_bb(ah, chan);
|
||||||
|
|
@ -0,0 +1,26 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:29:58 +0100
|
||||||
|
Subject: [PATCH] ath9k: ath9k_hw_4k_set_board_values: use rmw buffer
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
|
||||||
|
@@ -1082,6 +1082,7 @@ static void ath9k_hw_4k_set_board_values
|
||||||
|
mask = BIT(0)|BIT(5)|BIT(10)|BIT(15)|BIT(20)|BIT(25);
|
||||||
|
pwrctrl = mask * bb_desired_scale;
|
||||||
|
clr = mask * 0x1f;
|
||||||
|
+ ENABLE_REG_RMW_BUFFER(ah);
|
||||||
|
REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr);
|
||||||
|
REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr);
|
||||||
|
REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr);
|
||||||
|
@@ -1096,6 +1097,7 @@ static void ath9k_hw_4k_set_board_values
|
||||||
|
clr = mask * 0x1f;
|
||||||
|
REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr);
|
||||||
|
REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr);
|
||||||
|
+ REG_RMW_BUFFER_FLUSH(ah);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,27 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:29:59 +0100
|
||||||
|
Subject: [PATCH] ath9k: ath9k_hw_analog_shift_rmw: use REG_RMW
|
||||||
|
|
||||||
|
use REG_RMW in ath9k_hw_analog_shift_rmw.
|
||||||
|
It will double execution speed on usb bus.
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/eeprom.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/eeprom.c
|
||||||
|
@@ -27,12 +27,7 @@ void ath9k_hw_analog_shift_regwrite(stru
|
||||||
|
void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask,
|
||||||
|
u32 shift, u32 val)
|
||||||
|
{
|
||||||
|
- u32 regVal;
|
||||||
|
-
|
||||||
|
- regVal = REG_READ(ah, reg) & ~mask;
|
||||||
|
- regVal |= (val << shift) & mask;
|
||||||
|
-
|
||||||
|
- REG_WRITE(ah, reg, regVal);
|
||||||
|
+ REG_RMW(ah, reg, ((val << shift) & mask), mask);
|
||||||
|
|
||||||
|
if (ah->config.analog_shiftreg)
|
||||||
|
udelay(100);
|
@ -0,0 +1,47 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:30:01 +0100
|
||||||
|
Subject: [PATCH] ath9k: use REG_RMW and rmw buffer in
|
||||||
|
ath9k_hw_4k_set_gain
|
||||||
|
|
||||||
|
it is possible to reduce time needed for this function
|
||||||
|
by rplacing REG_WRITE with REG_RMW (plus dummy 0) and putt all commands
|
||||||
|
in same buffer.
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
|
||||||
|
@@ -772,15 +772,14 @@ static void ath9k_hw_4k_set_gain(struct
|
||||||
|
struct ar5416_eeprom_4k *eep,
|
||||||
|
u8 txRxAttenLocal)
|
||||||
|
{
|
||||||
|
- REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0,
|
||||||
|
- pModal->antCtrlChain[0]);
|
||||||
|
-
|
||||||
|
- REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0),
|
||||||
|
- (REG_READ(ah, AR_PHY_TIMING_CTRL4(0)) &
|
||||||
|
- ~(AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF |
|
||||||
|
- AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF)) |
|
||||||
|
- SM(pModal->iqCalICh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) |
|
||||||
|
- SM(pModal->iqCalQCh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF));
|
||||||
|
+ ENABLE_REG_RMW_BUFFER(ah);
|
||||||
|
+ REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0,
|
||||||
|
+ pModal->antCtrlChain[0], 0);
|
||||||
|
+
|
||||||
|
+ REG_RMW(ah, AR_PHY_TIMING_CTRL4(0),
|
||||||
|
+ SM(pModal->iqCalICh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) |
|
||||||
|
+ SM(pModal->iqCalQCh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF),
|
||||||
|
+ AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF | AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF);
|
||||||
|
|
||||||
|
if ((eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
|
||||||
|
AR5416_EEP_MINOR_VER_3) {
|
||||||
|
@@ -819,6 +818,7 @@ static void ath9k_hw_4k_set_gain(struct
|
||||||
|
AR9280_PHY_RXGAIN_TXRX_ATTEN, txRxAttenLocal);
|
||||||
|
REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000,
|
||||||
|
AR9280_PHY_RXGAIN_TXRX_MARGIN, pModal->rxTxMarginCh[0]);
|
||||||
|
+ REG_RMW_BUFFER_FLUSH(ah);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
@ -0,0 +1,67 @@ |
|||||||
|
From: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Date: Sun, 22 Mar 2015 19:30:03 +0100
|
||||||
|
Subject: [PATCH] ath9k: use REG_RMW and rmw buffer in
|
||||||
|
ath9k_hw_def_set_gain
|
||||||
|
|
||||||
|
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
|
||||||
|
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
|
||||||
|
---
|
||||||
|
|
||||||
|
--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
|
||||||
|
@@ -466,6 +466,7 @@ static void ath9k_hw_def_set_gain(struct
|
||||||
|
struct ar5416_eeprom_def *eep,
|
||||||
|
u8 txRxAttenLocal, int regChainOffset, int i)
|
||||||
|
{
|
||||||
|
+ ENABLE_REG_RMW_BUFFER(ah);
|
||||||
|
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_3) {
|
||||||
|
txRxAttenLocal = pModal->txRxAttenCh[i];
|
||||||
|
|
||||||
|
@@ -483,16 +484,12 @@ static void ath9k_hw_def_set_gain(struct
|
||||||
|
AR_PHY_GAIN_2GHZ_XATTEN2_DB,
|
||||||
|
pModal->xatten2Db[i]);
|
||||||
|
} else {
|
||||||
|
- REG_WRITE(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
|
||||||
|
- (REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) &
|
||||||
|
- ~AR_PHY_GAIN_2GHZ_BSW_MARGIN)
|
||||||
|
- | SM(pModal-> bswMargin[i],
|
||||||
|
- AR_PHY_GAIN_2GHZ_BSW_MARGIN));
|
||||||
|
- REG_WRITE(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
|
||||||
|
- (REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) &
|
||||||
|
- ~AR_PHY_GAIN_2GHZ_BSW_ATTEN)
|
||||||
|
- | SM(pModal->bswAtten[i],
|
||||||
|
- AR_PHY_GAIN_2GHZ_BSW_ATTEN));
|
||||||
|
+ REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
|
||||||
|
+ SM(pModal-> bswMargin[i], AR_PHY_GAIN_2GHZ_BSW_MARGIN),
|
||||||
|
+ AR_PHY_GAIN_2GHZ_BSW_MARGIN);
|
||||||
|
+ REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
|
||||||
|
+ SM(pModal->bswAtten[i], AR_PHY_GAIN_2GHZ_BSW_ATTEN),
|
||||||
|
+ AR_PHY_GAIN_2GHZ_BSW_ATTEN);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -504,17 +501,14 @@ static void ath9k_hw_def_set_gain(struct
|
||||||
|
AR_PHY_RXGAIN + regChainOffset,
|
||||||
|
AR9280_PHY_RXGAIN_TXRX_MARGIN, pModal->rxTxMarginCh[i]);
|
||||||
|
} else {
|
||||||
|
- REG_WRITE(ah,
|
||||||
|
- AR_PHY_RXGAIN + regChainOffset,
|
||||||
|
- (REG_READ(ah, AR_PHY_RXGAIN + regChainOffset) &
|
||||||
|
- ~AR_PHY_RXGAIN_TXRX_ATTEN)
|
||||||
|
- | SM(txRxAttenLocal, AR_PHY_RXGAIN_TXRX_ATTEN));
|
||||||
|
- REG_WRITE(ah,
|
||||||
|
- AR_PHY_GAIN_2GHZ + regChainOffset,
|
||||||
|
- (REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) &
|
||||||
|
- ~AR_PHY_GAIN_2GHZ_RXTX_MARGIN) |
|
||||||
|
- SM(pModal->rxTxMarginCh[i], AR_PHY_GAIN_2GHZ_RXTX_MARGIN));
|
||||||
|
+ REG_RMW(ah, AR_PHY_RXGAIN + regChainOffset,
|
||||||
|
+ SM(txRxAttenLocal, AR_PHY_RXGAIN_TXRX_ATTEN),
|
||||||
|
+ AR_PHY_RXGAIN_TXRX_ATTEN);
|
||||||
|
+ REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
|
||||||
|
+ SM(pModal->rxTxMarginCh[i], AR_PHY_GAIN_2GHZ_RXTX_MARGIN),
|
||||||
|
+ AR_PHY_GAIN_2GHZ_RXTX_MARGIN);
|
||||||
|
}
|
||||||
|
+ REG_RMW_BUFFER_FLUSH(ah);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
|
Loading…
Reference in new issue