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@ -1,51 +1,99 @@ |
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From 8622d6da5d95293d474c156612fd819fdaf542ec Mon Sep 17 00:00:00 2001
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From b5989f783de046577067fe356b1bb76cae07e867 Mon Sep 17 00:00:00 2001
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From: Kapil Hali <kapilh@broadcom.com>
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From: Kapil Hali <kapilh@broadcom.com>
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Date: Wed, 25 Nov 2015 08:58:53 -0500
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Date: Sat, 5 Dec 2015 06:53:41 -0500
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Subject: [PATCH 131/134] ARM: BCM: Clean up SMP support for Broadcom Kona
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Subject: [PATCH] ARM: BCM: Clean up SMP support for Broadcom Kona
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These changes cleans up SMP implementaion for Broadcom's
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These changes cleans up SMP implementaion for Broadcom's
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Kona SoC which are required for handling SMP for iProc
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Kona SoC which are required for handling SMP for iProc
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family of SoCs at a single place for BCM NSP and BCM Kona.
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family of SoCs at a single place for BCM NSP and BCM Kona.
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Signed-off-by: Kapil Hali <kapilh@broadcom.com>
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Signed-off-by: Kapil Hali <kapilh@broadcom.com>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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---
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arch/arm/boot/dts/bcm11351.dtsi | 2 +-
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.../bindings/arm/bcm/brcm,bcm11351-cpu-method.txt | 12 ++--
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arch/arm/boot/dts/bcm21664.dtsi | 2 +-
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arch/arm/boot/dts/bcm11351.dtsi | 4 +-
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arch/arm/mach-bcm/kona_smp.c | 82 +++++++++++++++++++++++++++--------------
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arch/arm/boot/dts/bcm21664.dtsi | 4 +-
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3 files changed, 56 insertions(+), 30 deletions(-)
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arch/arm/mach-bcm/kona_smp.c | 82 ++++++++++++++--------
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4 files changed, 64 insertions(+), 38 deletions(-)
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--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt
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+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt
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@@ -1,17 +1,17 @@
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Broadcom Kona Family CPU Enable Method
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--------------------------------------
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This binding defines the enable method used for starting secondary
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-CPUs in the following Broadcom SoCs:
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+CPU in the following Broadcom SoCs:
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BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664
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The enable method is specified by defining the following required
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-properties in the "cpus" device tree node:
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+properties in the corresponding secondary "cpu" device tree node:
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- enable-method = "brcm,bcm11351-cpu-method";
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- secondary-boot-reg = <...>;
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The secondary-boot-reg property is a u32 value that specifies the
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-physical address of the register used to request the ROM holding pen
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-code release a secondary CPU. The value written to the register is
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+physical address of the register used to request the ROM code
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+release a secondary CPU. The value written to the register is
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formed by encoding the target CPU id into the low bits of the
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physical start address it should jump to.
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@@ -19,8 +19,6 @@ Example:
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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- enable-method = "brcm,bcm11351-cpu-method";
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- secondary-boot-reg = <0x3500417c>;
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cpu0: cpu@0 {
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device_type = "cpu";
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@@ -31,6 +29,8 @@ Example:
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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+ enable-method = "brcm,bcm11351-cpu-method";
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+ secondary-boot-reg = <0x3500417c>;
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reg = <1>;
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};
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};
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--- a/arch/arm/boot/dts/bcm11351.dtsi
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--- a/arch/arm/boot/dts/bcm11351.dtsi
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+++ b/arch/arm/boot/dts/bcm11351.dtsi
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+++ b/arch/arm/boot/dts/bcm11351.dtsi
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@@ -31,7 +31,6 @@
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@@ -30,8 +30,6 @@
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cpus {
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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enable-method = "brcm,bcm11351-cpu-method";
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- enable-method = "brcm,bcm11351-cpu-method";
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- secondary-boot-reg = <0x3500417c>;
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- secondary-boot-reg = <0x3500417c>;
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cpu0: cpu@0 {
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cpu0: cpu@0 {
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device_type = "cpu";
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device_type = "cpu";
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@@ -42,6 +41,7 @@
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@@ -42,6 +40,8 @@
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cpu1: cpu@1 {
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cpu1: cpu@1 {
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device_type = "cpu";
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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compatible = "arm,cortex-a9";
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+ enable-method = "brcm,bcm11351-cpu-method";
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+ secondary-boot-reg = <0x3500417c>;
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+ secondary-boot-reg = <0x3500417c>;
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reg = <1>;
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reg = <1>;
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};
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};
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};
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};
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--- a/arch/arm/boot/dts/bcm21664.dtsi
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--- a/arch/arm/boot/dts/bcm21664.dtsi
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+++ b/arch/arm/boot/dts/bcm21664.dtsi
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+++ b/arch/arm/boot/dts/bcm21664.dtsi
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@@ -31,7 +31,6 @@
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@@ -30,8 +30,6 @@
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cpus {
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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enable-method = "brcm,bcm11351-cpu-method";
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- enable-method = "brcm,bcm11351-cpu-method";
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- secondary-boot-reg = <0x35004178>;
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- secondary-boot-reg = <0x35004178>;
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cpu0: cpu@0 {
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cpu0: cpu@0 {
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device_type = "cpu";
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device_type = "cpu";
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@@ -42,6 +41,7 @@
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@@ -42,6 +40,8 @@
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cpu1: cpu@1 {
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cpu1: cpu@1 {
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device_type = "cpu";
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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compatible = "arm,cortex-a9";
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+ enable-method = "brcm,bcm11351-cpu-method";
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+ secondary-boot-reg = <0x35004178>;
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+ secondary-boot-reg = <0x35004178>;
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reg = <1>;
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reg = <1>;
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};
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};
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@ -169,7 +217,7 @@ Signed-off-by: Kapil Hali <kapilh@broadcom.com> |
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{
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{
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void __iomem *boot_reg;
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void __iomem *boot_reg;
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phys_addr_t boot_func;
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phys_addr_t boot_func;
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@@ -154,15 +179,16 @@ static int bcm_boot_secondary(unsigned i
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@@ -154,15 +179,16 @@ static int bcm_boot_secondary(unsigned int cpu, struct task_struct *idle)
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -189,7 +237,7 @@ Signed-off-by: Kapil Hali <kapilh@broadcom.com> |
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}
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}
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/*
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/*
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@@ -191,12 +217,12 @@ static int bcm_boot_secondary(unsigned i
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@@ -191,12 +217,12 @@ static int bcm_boot_secondary(unsigned int cpu, struct task_struct *idle)
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pr_err("timeout waiting for cpu %u to start\n", cpu_id);
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pr_err("timeout waiting for cpu %u to start\n", cpu_id);
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