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@ -7,18 +7,19 @@ |
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#include <dt-bindings/soc/qcom,gsbi.h> |
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#include <dt-bindings/soc/qcom,gsbi.h> |
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#include <dt-bindings/reset/qcom,gcc-ipq806x.h> |
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#include <dt-bindings/reset/qcom,gcc-ipq806x.h> |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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#include <dt-bindings/interrupt-controller/irq.h> |
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#include <dt-bindings/gpio/gpio.h> |
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#include <dt-bindings/gpio/gpio.h> |
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/ { |
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/ { |
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model = "Qualcomm IPQ8065"; |
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model = "Qualcomm IPQ8065"; |
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compatible = "qcom,ipq8065"; |
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compatible = "qcom,ipq8065", "qcom,ipq8064"; |
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interrupt-parent = <&intc>; |
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interrupt-parent = <&intc>; |
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cpus { |
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cpus { |
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#address-cells = <1>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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#size-cells = <0>; |
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cpu@0 { |
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cpu0: cpu@0 { |
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compatible = "qcom,krait"; |
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compatible = "qcom,krait"; |
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enable-method = "qcom,kpss-acc-v1"; |
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enable-method = "qcom,kpss-acc-v1"; |
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device_type = "cpu"; |
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device_type = "cpu"; |
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@ -26,82 +27,18 @@ |
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next-level-cache = <&L2>; |
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next-level-cache = <&L2>; |
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qcom,acc = <&acc0>; |
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qcom,acc = <&acc0>; |
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qcom,saw = <&saw0>; |
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qcom,saw = <&saw0>; |
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clocks = <&kraitcc 0>; |
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clocks = <&kraitcc 0>, <&kraitcc 4>; |
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clock-names = "cpu"; |
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clock-names = "cpu", "l2"; |
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qcom,imem = <&imem>; |
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qcom,imem = <&imem>; |
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clock-latency = <100000>; |
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clock-latency = <100000>; |
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core-supply = <&smb208_s2a>; |
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cpu-supply = <&smb208_s2a>; |
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voltage-tolerance = <5>; |
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voltage-tolerance = <5>; |
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cooling-min-state = <0>; |
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cooling-min-state = <0>; |
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cooling-max-state = <10>; |
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cooling-max-state = <10>; |
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#cooling-cells = <2>; |
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#cooling-cells = <2>; |
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operating-points-0-0 = < |
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/* kHz uV */ |
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1725000 1262500 |
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1400000 1175000 |
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1000000 1100000 |
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800000 1050000 |
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600000 1000000 |
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384000 975000 |
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>; |
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operating-points-0-1 = < |
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/* kHz uV */ |
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1725000 1262500 |
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1400000 1175000 |
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1000000 1100000 |
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800000 1050000 |
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600000 1000000 |
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384000 950000 |
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>; |
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operating-points-0-2 = < |
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/* kHz uV */ |
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1725000 1200000 |
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1400000 1125000 |
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1000000 1050000 |
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800000 1000000 |
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600000 950000 |
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384000 925000 |
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>; |
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operating-points-0-3 = < |
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/* kHz uV */ |
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1725000 1175000 |
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1400000 1100000 |
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1000000 1025000 |
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800000 975000 |
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600000 925000 |
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384000 900000 |
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>; |
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operating-points-0-4 = < |
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/* kHz uV */ |
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1725000 1150000 |
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1400000 1075000 |
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1000000 1000000 |
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800000 950000 |
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600000 900000 |
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384000 875000 |
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>; |
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operating-points-0-5 = < |
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/* kHz uV */ |
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1725000 1100000 |
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1400000 1025000 |
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1000000 950000 |
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800000 900000 |
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600000 850000 |
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384000 825000 |
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>; |
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operating-points-0-6 = < |
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/* kHz uV */ |
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1725000 1050000 |
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1400000 975000 |
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1000000 900000 |
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800000 850000 |
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600000 800000 |
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384000 775000 |
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>; |
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}; |
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}; |
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cpu@1 { |
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cpu1: cpu@1 { |
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compatible = "qcom,krait"; |
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compatible = "qcom,krait"; |
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enable-method = "qcom,kpss-acc-v1"; |
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enable-method = "qcom,kpss-acc-v1"; |
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device_type = "cpu"; |
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device_type = "cpu"; |
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@ -109,92 +46,24 @@ |
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next-level-cache = <&L2>; |
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next-level-cache = <&L2>; |
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qcom,acc = <&acc1>; |
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qcom,acc = <&acc1>; |
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qcom,saw = <&saw1>; |
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qcom,saw = <&saw1>; |
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clocks = <&kraitcc 1>; |
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clocks = <&kraitcc 1>, <&kraitcc 4>; |
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clock-names = "cpu"; |
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clock-names = "cpu", "l2"; |
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qcom,imem = <&imem>; |
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qcom,imem = <&imem>; |
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clock-latency = <100000>; |
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clock-latency = <100000>; |
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core-supply = <&smb208_s2b>; |
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cpu-supply = <&smb208_s2b>; |
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cooling-min-state = <0>; |
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cooling-min-state = <0>; |
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cooling-max-state = <10>; |
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cooling-max-state = <10>; |
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#cooling-cells = <2>; |
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#cooling-cells = <2>; |
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operating-points-0-0 = < |
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/* kHz uV */ |
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1725000 1262500 |
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1400000 1175000 |
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1000000 1100000 |
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800000 1050000 |
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600000 1000000 |
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384000 975000 |
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>; |
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operating-points-0-1 = < |
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/* kHz uV */ |
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1725000 1262500 |
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1400000 1175000 |
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1000000 1100000 |
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800000 1050000 |
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600000 1000000 |
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384000 950000 |
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>; |
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operating-points-0-2 = < |
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/* kHz uV */ |
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1725000 1200000 |
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1400000 1125000 |
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1000000 1050000 |
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800000 1000000 |
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600000 950000 |
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384000 925000 |
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>; |
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operating-points-0-3 = < |
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/* kHz uV */ |
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1725000 1175000 |
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1400000 1100000 |
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1000000 1025000 |
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800000 975000 |
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600000 925000 |
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384000 900000 |
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>; |
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operating-points-0-4 = < |
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/* kHz uV */ |
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1725000 1150000 |
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1400000 1075000 |
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1000000 1000000 |
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800000 950000 |
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600000 900000 |
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384000 875000 |
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>; |
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operating-points-0-5 = < |
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/* kHz uV */ |
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1725000 1100000 |
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1400000 1025000 |
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1000000 950000 |
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800000 900000 |
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600000 850000 |
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384000 825000 |
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>; |
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operating-points-0-6 = < |
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/* kHz uV */ |
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1725000 1050000 |
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1400000 975000 |
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1000000 900000 |
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800000 850000 |
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600000 800000 |
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384000 775000 |
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>; |
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}; |
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}; |
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L2: l2-cache { |
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L2: l2-cache { |
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compatible = "cache"; |
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compatible = "cache"; |
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cache-level = <2>; |
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cache-level = <2>; |
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clocks = <&kraitcc 4>; |
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qcom,saw = <&saw_l2>; |
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clock-names = "cache"; |
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}; |
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cache-points-kHz = < |
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/* kHz uV CPU kHz */ |
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qcom,l2 { |
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1200000 1150000 1200000 |
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qcom,l2-rates = <384000000 1000000000 1200000000>; |
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1000000 1100000 600000 |
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384000 1100000 384000 |
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>; |
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vdd_dig-supply = <&smb208_s1a>; |
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}; |
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}; |
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}; |
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}; |
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@ -357,48 +226,6 @@ |
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qcom,switch-mode-frequency = <1200000>; |
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qcom,switch-mode-frequency = <1200000>; |
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}; |
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}; |
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}; |
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}; |
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rpm_clocks { |
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#clock-cells = <0>; |
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compatible = "qcom,rpm-clk"; |
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qcom,rpm-clk-active-only; |
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cxo_clk: cxo { |
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reg = <QCOM_RPM_CXO_CLK>; |
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qcom,rpm-clk-name = "cxo"; |
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qcom,rpm-clk-freq = <25000000>; |
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}; |
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pxo_clk: pxo { |
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reg = <QCOM_RPM_PXO_CLK>; |
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qcom,rpm-clk-name = "pxo"; |
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qcom,rpm-clk-freq = <25000000>; |
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}; |
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ebi1_clk: ebi1 { |
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reg = <QCOM_RPM_EBI1_CLK>; |
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qcom,rpm-clk-name = "ebi1"; |
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qcom,rpm-clk-freq = <533000000>; |
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}; |
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apps_fabric_clk: apps-fabric { |
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reg = <QCOM_RPM_APPS_FABRIC_CLK>; |
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qcom,rpm-clk-name = "apps-fabric"; |
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qcom,rpm-clk-freq = <533000000>; |
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}; |
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nss_fabric0_clk: nss-fabric0 { |
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reg = <QCOM_RPM_NSS_FABRIC_0_CLK>; |
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qcom,rpm-clk-name = "nss-fabric0"; |
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qcom,rpm-clk-freq = <533000000>; |
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}; |
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nss_fabric1_clk: nss-fabric1 { |
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reg = <QCOM_RPM_NSS_FABRIC_1_CLK>; |
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qcom,rpm-clk-name = "nss-fabric1"; |
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qcom,rpm-clk-freq = <266000000>; |
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}; |
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}; |
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}; |
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}; |
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rng@1a500000 { |
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rng@1a500000 { |
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@ -511,17 +338,28 @@ |
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}; |
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}; |
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saw0: regulator@2089000 { |
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saw0: regulator@2089000 { |
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compatible = "qcom,saw2"; |
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compatible = "qcom,saw2", "syscon"; |
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reg = <0x02089000 0x1000>, <0x02009000 0x1000>; |
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reg = <0x02089000 0x1000>, <0x02009000 0x1000>; |
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regulator; |
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regulator; |
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}; |
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}; |
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|
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saw1: regulator@2099000 { |
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saw1: regulator@2099000 { |
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compatible = "qcom,saw2"; |
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compatible = "qcom,saw2", "syscon"; |
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reg = <0x02099000 0x1000>, <0x02009000 0x1000>; |
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reg = <0x02099000 0x1000>, <0x02009000 0x1000>; |
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regulator; |
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regulator; |
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}; |
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}; |
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|
|
|
|
|
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saw_l2: regulator@02012000 { |
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|
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|
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compatible = "qcom,saw2", "syscon"; |
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|
|
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|
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reg = <0x02012000 0x1000>; |
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|
|
|
|
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regulator; |
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|
|
|
|
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}; |
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|
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|
|
|
|
sic_non_secure: sic-non-secure@12100000 { |
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|
|
|
|
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compatible = "syscon"; |
|
|
|
|
|
|
|
reg = <0x12100000 0x10000>; |
|
|
|
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
|
|
gsbi1: gsbi@12440000 { |
|
|
|
gsbi1: gsbi@12440000 { |
|
|
|
compatible = "qcom,gsbi-v1.0.0"; |
|
|
|
compatible = "qcom,gsbi-v1.0.0"; |
|
|
|
cell-index = <1>; |
|
|
|
cell-index = <1>; |
|
|
@ -817,6 +655,7 @@ |
|
|
|
reg = <0x00900000 0x4000>; |
|
|
|
reg = <0x00900000 0x4000>; |
|
|
|
#clock-cells = <1>; |
|
|
|
#clock-cells = <1>; |
|
|
|
#reset-cells = <1>; |
|
|
|
#reset-cells = <1>; |
|
|
|
|
|
|
|
#power-domain-cells = <1>; |
|
|
|
}; |
|
|
|
}; |
|
|
|
|
|
|
|
|
|
|
|
lcc: clock-controller@28000000 { |
|
|
|
lcc: clock-controller@28000000 { |
|
|
@ -1103,7 +942,7 @@ |
|
|
|
adm_dma: dma@18300000 { |
|
|
|
adm_dma: dma@18300000 { |
|
|
|
compatible = "qcom,adm"; |
|
|
|
compatible = "qcom,adm"; |
|
|
|
reg = <0x18300000 0x100000>; |
|
|
|
reg = <0x18300000 0x100000>; |
|
|
|
interrupts = <0 170 0>; |
|
|
|
interrupts = <GIC_SPI 170 IRQ_TYPE_NONE>; |
|
|
|
#dma-cells = <1>; |
|
|
|
#dma-cells = <1>; |
|
|
|
|
|
|
|
|
|
|
|
clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>; |
|
|
|
clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>; |
|
|
@ -1221,6 +1060,7 @@ |
|
|
|
|
|
|
|
|
|
|
|
status = "disabled"; |
|
|
|
status = "disabled"; |
|
|
|
}; |
|
|
|
}; |
|
|
|
|
|
|
|
|
|
|
|
/* Temporary fixed regulator */ |
|
|
|
/* Temporary fixed regulator */ |
|
|
|
vsdcc_fixed: vsdcc-regulator { |
|
|
|
vsdcc_fixed: vsdcc-regulator { |
|
|
|
compatible = "regulator-fixed"; |
|
|
|
compatible = "regulator-fixed"; |
|
|
@ -1294,7 +1134,6 @@ |
|
|
|
#dma-names = "tx", "rx"; |
|
|
|
#dma-names = "tx", "rx"; |
|
|
|
}; |
|
|
|
}; |
|
|
|
}; |
|
|
|
}; |
|
|
|
|
|
|
|
|
|
|
|
}; |
|
|
|
}; |
|
|
|
|
|
|
|
|
|
|
|
sfpb_mutex: sfpb-mutex { |
|
|
|
sfpb_mutex: sfpb-mutex { |
|
|
|