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@ -56,6 +56,8 @@ |
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#define AR71XX_DMA_SIZE 0x10000 |
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#define AR71XX_STEREO_BASE (AR71XX_APB_BASE + 0x000B0000) |
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#define AR71XX_STEREO_SIZE 0x10000 |
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#define AR91XX_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000) |
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#define AR91XX_WMAC_SIZE 0x30000 |
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#define AR71XX_CPU_IRQ_BASE 0 |
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#define AR71XX_MISC_IRQ_BASE 8 |
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@ -343,6 +345,7 @@ extern void ar71xx_ddr_flush(u32 reg); |
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#define RESET_MODULE_EXTERNAL BIT(28) |
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#define RESET_MODULE_FULL_CHIP BIT(24) |
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#define RESET_MODULE_AMBA2WMAC BIT(22) |
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#define RESET_MODULE_CPU_NMI BIT(21) |
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#define RESET_MODULE_CPU_COLD BIT(20) |
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#define RESET_MODULE_DMA BIT(19) |
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