The DWR-116-A1/2 Wireless Router is based on the MT7620N SoC. Specification: MediaTek MT7620N (580 Mhz) 32 MB of RAM 8 MB of FLASH 802.11bgn radio 5x 10/100 Mbps Ethernet (1 WAN and 4 LAN) 2x external, non-detachable antennas UART (J1 in A1, JP1 in A2) header on PCB (57600 8n1) 6x LED (GPIO-controlled), 2x button JBOOT bootloader Known issues: WAN LED is drived by uartl tx pin. I decide to use this pin as uartlite tx pin. Installation: Apply factory image via http web-gui. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>master
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/dts-v1/; |
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#include "mt7620n.dtsi" |
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#include <dt-bindings/gpio/gpio.h> |
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#include <dt-bindings/input/input.h> |
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/ { |
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compatible = "dlink,dwr-116-a1", "ralink,mt7620n-soc"; |
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model = "D-Link DWR-116 A1/A2"; |
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gpio-keys-polled { |
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compatible = "gpio-keys-polled"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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poll-interval = <20>; |
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wps { |
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label = "wps"; |
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; |
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linux,code = <KEY_WPS_BUTTON>; |
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}; |
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reset { |
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label = "reset"; |
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; |
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linux,code = <KEY_RESTART>; |
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}; |
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}; |
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gpio-leds { |
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compatible = "gpio-leds"; |
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status { |
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label = "dwr-116-a1:green:status"; |
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; |
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}; |
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wifi { |
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label = "dwr-116-a1:green:wifi"; |
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gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; |
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}; |
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}; |
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}; |
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&gpio1 { |
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status = "okay"; |
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}; |
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&gpio3 { |
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status = "okay"; |
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}; |
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&spi0 { |
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status = "okay"; |
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m25p80@0 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "jedec,spi-nor"; |
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reg = <0>; |
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spi-max-frequency = <50000000>; |
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partition@0 { |
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label = "jboot"; |
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reg = <0x0 0x10000>; |
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read-only; |
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}; |
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partition@10000 { |
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label = "firmware"; |
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reg = <0x10000 0x7e0000>; |
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}; |
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config: partition@7f0000 { |
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label = "config"; |
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reg = <0x7f0000 0x10000>; |
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read-only; |
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}; |
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}; |
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}; |
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&ehci { |
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status = "okay"; |
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}; |
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&ohci { |
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status = "okay"; |
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}; |
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&pinctrl { |
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state_default: pinctrl0 { |
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default { |
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ralink,group = "i2c", "wled"; |
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ralink,function = "gpio"; |
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}; |
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}; |
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}; |
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ðernet { |
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mediatek,portmap = "llllw"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&ephy_pins>; |
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}; |
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