This patch adds support for the Cisco Meraki MR24 Access point to the apm821xx target. Board: MR24 - Meraki MR24 Cloud Managed Access Point CPU: APM82181 SoC 800 MHz (PLB=200 OPB=100 EBC=100) Flash size: 32MiB RAM Size: 128MiB Wireless: Atheros AR9380 5.0GHz + Atheros AR9380 2.4GHz Ethernet ports: 1x Gigabit Atheros AR8035 WARNING: The serial port needs a TTL/RS-232 v3.3 level converter! For flashing instructions, visit: <https://github.com/riptidewave93/Openwrt-MR24/blob/master/README.md#flashing> Signed-off-by: Chris Blake <chrisrblake93@gmail.com>master
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3827ce2c3d
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@ -0,0 +1,14 @@ |
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#!/bin/sh |
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|
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. /lib/apm821xx.sh |
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|
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preinit_set_mac_address() { |
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case $(apm821xx_board_name) in |
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mr24) |
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mac_lan=$(mtd_get_mac_binary_ubi board-config 102) |
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[ -n "$mac_lan" ] && ifconfig eth0 hw ether "$mac_lan" |
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;; |
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esac |
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} |
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|
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boot_hook_add preinit_main preinit_set_mac_address |
@ -0,0 +1,65 @@ |
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#!/bin/sh |
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# |
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# Copyright (C) 2016 Chris Blake <chrisrblake93@gmail.com> |
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# |
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# Custom upgrade script for Meraki NAND devices (ex. MR24) |
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# Based on merakinand.sh from the ar71xx target |
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# |
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. /lib/apm821xx.sh |
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. /lib/functions.sh |
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merakinand_do_kernel_check() { |
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local board_name="$1" |
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local tar_file="$2" |
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local image_magic_word=`(tar xf $tar_file sysupgrade-$board_name/kernel -O 2>/dev/null | dd bs=1 count=4 skip=0 2>/dev/null | hexdump -v -n 4 -e '1/1 "%02x"')` |
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|
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# What is our kernel magic string? |
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case "$board_name" in |
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"mr24") |
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[ "$image_magic_word" == "8e73ed8a" ] && { |
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echo "pass" && return 0 |
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} |
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;; |
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esac |
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exit 1 |
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} |
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merakinand_do_platform_check() { |
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local board_name="$1" |
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local tar_file="$2" |
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local control_length=`(tar xf $tar_file sysupgrade-$board_name/CONTROL -O | wc -c) 2> /dev/null` |
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local file_type="$(identify_tar $2 sysupgrade-$board_name/root)" |
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local kernel_magic="$(merakinand_do_kernel_check $1 $2)" |
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case "$board_name" in |
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"mr24") |
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[ "$control_length" = 0 -o "$file_type" != "squashfs" -o "$kernel_magic" != "pass" ] && { |
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echo "Invalid sysupgrade file for $board_name" |
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return 1 |
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} |
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;; |
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*) |
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echo "Unsupported device $board_name"; |
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return 1 |
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;; |
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esac |
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return 0 |
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} |
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merakinand_do_upgrade() { |
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local tar_file="$1" |
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local board_name="$(cat /tmp/sysinfo/board_name)" |
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# Do we need to do any platform tweaks? |
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case "$board_name" in |
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"mr24") |
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nand_do_upgrade $1 |
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;; |
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*) |
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echo "Unsupported device $board_name"; |
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exit 1 |
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;; |
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esac |
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} |
@ -0,0 +1,433 @@ |
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/* |
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* Device Tree Source for Meraki MR24 (Ikarem) |
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* |
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* Copyright (C) 2016 Chris Blake <chrisrblake93@gmail.com> |
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* |
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* Based on Cisco Meraki GPL Release r23-20150601 MR24 DTS |
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* |
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* This file is licensed under the terms of the GNU General Public |
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* License version 2. This program is licensed "as is" without |
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* any warranty of any kind, whether express or implied. |
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*/ |
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/dts-v1/; |
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/ { |
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#address-cells = <2>; |
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#size-cells = <1>; |
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model = "Meraki MR24 Access Point"; |
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compatible = "meraki,ikarem"; |
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dcr-parent = <&{/cpus/cpu@0}>; |
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|
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aliases { |
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ethernet0 = &EMAC0; |
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serial0 = &UART0; |
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}; |
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cpus { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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cpu@0 { |
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device_type = "cpu"; |
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model = "PowerPC,apm821xx"; |
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reg = <0x00000000>; |
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clock-frequency = <0>; /* Filled in by U-Boot */ |
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timebase-frequency = <0>; /* Filled in by U-Boot */ |
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i-cache-line-size = <32>; |
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d-cache-line-size = <32>; |
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i-cache-size = <32768>; |
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d-cache-size = <32768>; |
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dcr-controller; |
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dcr-access-method = "native"; |
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next-level-cache = <&L2C0>; |
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}; |
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}; |
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memory { |
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device_type = "memory"; |
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reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ |
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}; |
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UIC0: interrupt-controller0 { |
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compatible = "ibm,uic"; |
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interrupt-controller; |
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cell-index = <0>; |
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dcr-reg = <0x0c0 0x009>; |
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#address-cells = <0>; |
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#size-cells = <0>; |
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#interrupt-cells = <2>; |
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}; |
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UIC1: interrupt-controller1 { |
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compatible = "ibm,uic"; |
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interrupt-controller; |
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cell-index = <1>; |
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dcr-reg = <0x0d0 0x009>; |
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#address-cells = <0>; |
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#size-cells = <0>; |
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#interrupt-cells = <2>; |
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interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
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interrupt-parent = <&UIC0>; |
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}; |
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UIC2: interrupt-controller2 { |
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compatible = "ibm,uic"; |
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interrupt-controller; |
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cell-index = <2>; |
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dcr-reg = <0x0e0 0x009>; |
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#address-cells = <0>; |
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#size-cells = <0>; |
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#interrupt-cells = <2>; |
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interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ |
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interrupt-parent = <&UIC0>; |
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}; |
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UIC3: interrupt-controller3 { |
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compatible = "ibm,uic"; |
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interrupt-controller; |
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cell-index = <3>; |
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dcr-reg = <0x0f0 0x009>; |
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#address-cells = <0>; |
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#size-cells = <0>; |
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#interrupt-cells = <2>; |
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interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ |
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interrupt-parent = <&UIC0>; |
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}; |
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|
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/* KPH check the following */ |
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OCM: ocm@400040000 { |
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compatible = "ibm,ocm"; |
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status = "okay"; |
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cell-index = <1>; |
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/* configured in U-Boot */ |
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reg = <4 0x00040000 0x8000>; /* 32K */ |
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}; |
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SDR0: sdr { |
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compatible = "ibm,sdr-apm821xx"; |
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dcr-reg = <0x00e 0x002>; |
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}; |
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CPR0: cpr { |
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compatible = "ibm,cpr-apm821xx"; |
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dcr-reg = <0x00c 0x002>; |
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}; |
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L2C0: l2c { |
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compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache"; |
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dcr-reg = <0x020 0x008 |
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0x030 0x008>; |
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cache-line-size = <32>; |
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cache-size = <262144>; |
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interrupt-parent = <&UIC1>; |
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interrupts = <11 1>; |
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}; |
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/* kph check the below */ |
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CPM0: cpm { |
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compatible = "ibm,cpm-apm821xx", "ibm,cpm"; |
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cell-index = <0>; |
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dcr-reg = <0x160 0x003>; |
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pm-cpu = <0x02000000>; |
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pm-doze = <0x302570F0>; |
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pm-nap = <0x302570F0>; |
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pm-deepsleep = <0x302570F0>; |
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pm-iic-device = <&IIC0>; |
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pm-emac-device = <&EMAC0>; |
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}; |
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plb { |
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compatible = "ibm,plb4"; |
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#address-cells = <2>; |
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#size-cells = <1>; |
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ranges; |
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clock-frequency = <0>; /* Filled in by U-Boot */ |
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SDRAM0: sdram { |
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compatible = "ibm,sdram-apm821xx"; |
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dcr-reg = <0x010 0x002>; |
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}; |
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/* kph check the below */ |
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CRYPTO: crypto@180000 { |
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compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto"; |
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reg = <4 0x00180000 0x80400>; |
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interrupt-parent = <&UIC0>; |
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interrupts = <0x1d 0x4>; |
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}; |
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/* kph check the below */ |
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PKA: pka@114000 { |
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device_type = "pka"; |
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compatible = "ppc4xx-pka", "amcc,ppc4xx-pka"; |
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reg = <4 0x00114000 0x4000>; |
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interrupt-parent = <&UIC0>; |
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interrupts = <0x14 0x2>; |
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}; |
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/* kph check the below */ |
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TRNG: trng@110000 { |
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compatible = "ppc4xx-trng", "amcc,ppc460ex-rng"; |
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reg = <4 0x00110000 0x50>; |
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interrupt-parent = <&UIC1>; |
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interrupts = <0x3 0x2>; |
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}; |
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MAL0: mcmal { |
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compatible = "ibm,mcmal2"; |
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descriptor-memory = "ocm"; |
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dcr-reg = <0x180 0x062>; |
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num-tx-chans = <1>; |
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num-rx-chans = <1>; |
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#address-cells = <0>; |
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#size-cells = <0>; |
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interrupt-parent = <&UIC2>; |
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interrupts = < /*TXEOB*/ 0x6 0x4 |
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/*RXEOB*/ 0x7 0x4 |
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/*SERR*/ 0x3 0x4 |
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/*TXDE*/ 0x4 0x4 |
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/*RXDE*/ 0x5 0x4>; |
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}; |
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POB0: opb { |
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compatible = "ibm,opb"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; |
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clock-frequency = <0>; /* Filled in by U-Boot */ |
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EBC0: ebc { |
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compatible = "ibm,ebc"; |
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dcr-reg = <0x012 0x002>; |
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#address-cells = <2>; |
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#size-cells = <1>; |
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clock-frequency = <0>; /* Filled in by U-Boot */ |
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/* ranges property is supplied by U-Boot */ |
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ranges = < 0x00000003 0x00000000 0xe0000000 0x8000000>; |
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interrupts = <0x6 0x4>; |
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interrupt-parent = <&UIC1>; |
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/* Ikarem has 32MB of NAND */ |
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ndfc@1,0 { |
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compatible = "ibm,ndfc"; |
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reg = <00000003 00000000 00000400>; |
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ccr = <0x00001000>; |
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bank-settings = <0x80002222>; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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/* 32 MiB NAND Flash */ |
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nand { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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partition@0 { |
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label = "u-boot"; |
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reg = <0x00000000 0x00170000>; |
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read-only; |
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}; |
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partition@170000 { |
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label = "oops"; |
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reg = <0x00170000 0x00010000>; |
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}; |
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partition@180000 { |
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label = "ubi"; |
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reg = <0x00180000 0x01e80000>; |
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}; |
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}; |
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}; |
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}; |
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UART0: serial@ef600400 { |
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device_type = "serial"; |
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compatible = "ns16550"; |
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reg = <0xef600400 0x00000008>; |
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virtual-reg = <0xef600400>; |
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clock-frequency = <0>; /* Filled in by U-Boot */ |
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current-speed = <0>; /* Filled in by U-Boot */ |
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interrupt-parent = <&UIC0>; |
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interrupts = <0x1 0x4>; |
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}; |
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GPIO0: gpio@ef600b00 { |
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compatible = "ibm,ppc4xx-gpio"; |
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reg = <0xef600b00 0x00000048>; |
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#gpio-cells = <2>; |
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gpio-controller; |
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}; |
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gpio-leds { |
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compatible = "gpio-leds"; |
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power-green { |
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label = "mr24:green:power"; |
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gpios = <&GPIO0 18 1>; |
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}; |
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power-orange { |
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label = "mr24:orange:power"; |
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gpios = <&GPIO0 19 1>; |
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}; |
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lan { |
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label = "mr24:green:wan"; |
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gpios = <&GPIO0 17 1>; |
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}; |
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ssi-0 { |
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label = "mr24:green:wifi1"; |
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gpios = <&GPIO0 23 1>; |
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}; |
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ssi-1 { |
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label = "mr24:green:wifi2"; |
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gpios = <&GPIO0 22 1>; |
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}; |
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ssi-2 { |
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label = "mr24:green:wifi3"; |
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gpios = <&GPIO0 21 1>; |
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}; |
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ssi-3 { |
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label = "mr24:green:wifi4"; |
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gpios = <&GPIO0 20 1>; |
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}; |
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}; |
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gpio_keys_polled { |
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compatible = "gpio-keys-polled"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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poll-interval = <60>; /* 3 * 20 = 60ms */ |
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autorepeat; |
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button@1 { |
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label = "Reset button"; |
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linux,code = <0x198>; /* KEY_RESTART */ |
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gpios = <&GPIO0 16 1>; |
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}; |
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}; |
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IIC0: i2c@ef600700 { |
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compatible = "ibm,iic"; |
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reg = <0xef600700 0x00000014>; |
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interrupt-parent = <&UIC0>; |
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interrupts = <0x2 0x4>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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/* Boot ROM is at 0x52-0x53, do not touch */ |
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/* Unknown chip at 0x6e, not sure what it is */ |
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}; |
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IIC1: i2c@ef600800 { |
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compatible = "ibm,iic"; |
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reg = <0xef600800 0x00000014>; |
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interrupt-parent = <&UIC0>; |
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interrupts = <0x3 0x4>; |
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}; |
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RGMII0: emac-rgmii@ef601500 { |
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compatible = "ibm,rgmii"; |
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reg = <0xef601500 0x00000008>; |
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has-mdio; |
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}; |
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TAH0: emac-tah@ef601350 { |
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compatible = "ibm,tah"; |
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reg = <0xef601350 0x00000030>; |
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}; |
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EMAC0: ethernet@ef600c00 { |
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device_type = "network"; |
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compatible = "ibm,emac-apm821xx", "ibm,emac4sync"; |
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interrupt-parent = <&EMAC0>; |
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interrupts = <0x0 0x1>; |
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#interrupt-cells = <1>; |
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#address-cells = <0>; |
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#size-cells = <0>; |
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interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 |
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/*Wake*/ 0x1 &UIC2 0x14 0x4>; |
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reg = <0xef600c00 0x000000c4>; |
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local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
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mal-device = <&MAL0>; |
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mal-tx-channel = <0>; |
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mal-rx-channel = <0>; |
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cell-index = <0>; |
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max-frame-size = <9000>; |
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rx-fifo-size = <16384>; |
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tx-fifo-size = <2048>; |
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phy-mode = "rgmii"; |
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phy-map = <0x00000000>; |
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rgmii-device = <&RGMII0>; |
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rgmii-channel = <0>; |
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tah-device = <&TAH0>; |
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tah-channel = <0>; |
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has-inverted-stacr-oc; |
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has-new-stacr-staopc; |
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}; |
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}; |
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PCIE0: pciex@d00000000 { |
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device_type = "pci"; |
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#interrupt-cells = <1>; |
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#size-cells = <2>; |
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#address-cells = <3>; |
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compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex"; |
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primary; |
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port = <0x0>; /* port number */ |
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reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ |
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0x0000000c 0x08010000 0x00001000>; /* Registers */ |
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dcr-reg = <0x100 0x020>; |
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sdr-base = <0x300>; |
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/* Outbound ranges, one memory and one IO, |
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* later cannot be changed |
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*/ |
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ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 |
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0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000 |
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0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; |
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/* Inbound 2GB range starting at 0 */ |
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dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
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/* This drives busses 40 to 0x7f */ |
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bus-range = <0x40 0x7f>; |
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|
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/* Legacy interrupts (note the weird polarity, the bridge seems |
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* to invert PCIe legacy interrupts). |
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* We are de-swizzling here because the numbers are actually for |
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* port of the root complex virtual P2P bridge. But I want |
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* to avoid putting a node for it in the tree, so the numbers |
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* below are basically de-swizzled numbers. |
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* The real slot is on idsel 0, so the swizzling is 1:1 |
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*/ |
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interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
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interrupt-map = < |
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0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ |
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0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ |
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0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ |
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0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; |
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}; |
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|
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MSI: ppc4xx-msi@C10000000 { |
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compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; |
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reg = < 0xC 0x10000000 0x100 |
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0xC 0x10000000 0x100>; |
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sdr-base = <0x36C>; |
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msi-data = <0x00004440>; |
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msi-mask = <0x0000ffe0>; |
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interrupts =<0 1 2 3 4 5 6 7>; |
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interrupt-parent = <&MSI>; |
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#interrupt-cells = <1>; |
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#address-cells = <0>; |
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#size-cells = <0>; |
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msi-available-ranges = <0x0 0x100>; |
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interrupt-map = < |
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0 &UIC3 0x18 1 |
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1 &UIC3 0x19 1 |
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2 &UIC3 0x1A 1 |
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3 &UIC3 0x1B 1 |
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4 &UIC3 0x1C 1 |
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5 &UIC3 0x1D 1 |
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6 &UIC3 0x1E 1 |
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7 &UIC3 0x1F 1 |
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>; |
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}; |
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}; |
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|
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chosen { |
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linux,stdout-path = "/plb/opb/serial@ef600400"; |
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}; |
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}; |
@ -0,0 +1,9 @@ |
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CONFIG_IKAREM=y |
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CONFIG_MTD_UBI=y |
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CONFIG_MTD_UBI_BEB_LIMIT=20 |
||||
CONFIG_MTD_UBI_BLOCK=y |
||||
# CONFIG_MTD_UBI_FASTMAP is not set |
||||
# CONFIG_MTD_UBI_GLUEBI is not set |
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096 |
||||
CONFIG_UBIFS_FS=y |
||||
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set |
@ -0,0 +1,7 @@ |
||||
BOARDNAME:=Devices with NAND flash (Routers)
|
||||
FEATURES += nand pcie ramdisk squashfs usb
|
||||
|
||||
define Target/Description |
||||
Build firmware images for APM821XX boards with NAND flash.
|
||||
For routers like the MR24 or the WNDR4700.
|
||||
endef |
@ -0,0 +1,62 @@ |
||||
From 0c13957a43a90b1522eb616f3c9967ec44e4da1d Mon Sep 17 00:00:00 2001
|
||||
From: Christian Lamparter <chunkeey@googlemail.com>
|
||||
Date: Tue, 3 May 2016 13:58:24 +0200
|
||||
Subject: [PATCH] drivers: net: emac: add Atheros AR8035 phy initialization
|
||||
code
|
||||
To: netdev@vger.kernel.org
|
||||
|
||||
This patch adds the phy initialization code for Qualcomm
|
||||
Atheros AR8035 phy. This configuration is found in the
|
||||
Cisco Meraki MR24.
|
||||
|
||||
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
|
||||
---
|
||||
drivers/net/ethernet/ibm/emac/phy.c | 26 ++++++++++++++++++++++++++
|
||||
1 file changed, 26 insertions(+)
|
||||
|
||||
diff --git a/drivers/net/ethernet/ibm/emac/phy.c b/drivers/net/ethernet/ibm/emac/phy.c
|
||||
index d3b9d10..5b88cc6 100644
|
||||
--- a/drivers/net/ethernet/ibm/emac/phy.c
|
||||
+++ b/drivers/net/ethernet/ibm/emac/phy.c
|
||||
@@ -470,12 +470,38 @@ static struct mii_phy_def m88e1112_phy_def = {
|
||||
.ops = &m88e1112_phy_ops,
|
||||
};
|
||||
|
||||
+static int ar8035_init(struct mii_phy *phy)
|
||||
+{
|
||||
+ phy_write(phy, 0x1d, 0x5); /* Address debug register 5 */
|
||||
+ phy_write(phy, 0x1e, 0x2d47); /* Value copied from u-boot */
|
||||
+ phy_write(phy, 0x1d, 0xb); /* Address hib ctrl */
|
||||
+ phy_write(phy, 0x1e, 0xbc20); /* Value copied from u-boot */
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct mii_phy_ops ar8035_phy_ops = {
|
||||
+ .init = ar8035_init,
|
||||
+ .setup_aneg = genmii_setup_aneg,
|
||||
+ .setup_forced = genmii_setup_forced,
|
||||
+ .poll_link = genmii_poll_link,
|
||||
+ .read_link = genmii_read_link,
|
||||
+};
|
||||
+
|
||||
+static struct mii_phy_def ar8035_phy_def = {
|
||||
+ .phy_id = 0x004dd070,
|
||||
+ .phy_id_mask = 0xfffffff0,
|
||||
+ .name = "Atheros 8035 Gigabit Ethernet",
|
||||
+ .ops = &ar8035_phy_ops,
|
||||
+};
|
||||
+
|
||||
static struct mii_phy_def *mii_phy_table[] = {
|
||||
&et1011c_phy_def,
|
||||
&cis8201_phy_def,
|
||||
&bcm5248_phy_def,
|
||||
&m88e1111_phy_def,
|
||||
&m88e1112_phy_def,
|
||||
+ &ar8035_phy_def,
|
||||
&genmii_phy_def,
|
||||
NULL
|
||||
};
|
||||
--
|
||||
2.8.1
|
||||
|
@ -0,0 +1,31 @@ |
||||
--- a/arch/powerpc/platforms/44x/Kconfig
|
||||
+++ b/arch/powerpc/platforms/44x/Kconfig
|
||||
@@ -40,6 +40,19 @@ config EBONY
|
||||
help
|
||||
This option enables support for the IBM PPC440GP evaluation board.
|
||||
|
||||
+config IKAREM
|
||||
+ bool "Ikarem"
|
||||
+ depends on 44x
|
||||
+ default n
|
||||
+ select PPC44x_SIMPLE
|
||||
+ select APM821xx
|
||||
+ select PCI_MSI
|
||||
+ select PPC4xx_MSI
|
||||
+ select PPC4xx_PCI_EXPRESS
|
||||
+ select IBM_EMAC_RGMII
|
||||
+ help
|
||||
+ This option enables support for the Cisco Meraki MR24 (Ikarem) Access Point.
|
||||
+
|
||||
config SAM440EP
|
||||
bool "Sam440ep"
|
||||
depends on 44x
|
||||
--- a/arch/powerpc/platforms/44x/ppc44x_simple.c
|
||||
+++ b/arch/powerpc/platforms/44x/ppc44x_simple.c
|
||||
@@ -62,6 +62,7 @@ static char *board[] __initdata = {
|
||||
"amcc,sequoia",
|
||||
"amcc,taishan",
|
||||
"amcc,yosemite",
|
||||
+ "meraki,ikarem",
|
||||
"mosaixtech,icon"
|
||||
};
|
Loading…
Reference in new issue