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@ -39,7 +39,7 @@ Signed-off-by: Andy Gross <agross@codeaurora.org> |
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+obj-$(CONFIG_PHY_QCOM_DWC3) += phy-qcom-dwc3.o
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+obj-$(CONFIG_PHY_QCOM_DWC3) += phy-qcom-dwc3.o
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--- /dev/null
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--- /dev/null
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+++ b/drivers/phy/phy-qcom-dwc3.c
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+++ b/drivers/phy/phy-qcom-dwc3.c
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@@ -0,0 +1,492 @@
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@@ -0,0 +1,484 @@
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+/* Copyright (c) 2014-2015, Code Aurora Forum. All rights reserved.
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+/* Copyright (c) 2014-2015, Code Aurora Forum. All rights reserved.
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+ *
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * This program is free software; you can redistribute it and/or modify
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@ -99,7 +99,7 @@ Signed-off-by: Andy Gross <agross@codeaurora.org> |
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+
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+
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+/* PHY_CTRL_REG */
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+/* PHY_CTRL_REG */
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+#define SSUSB_CTRL_REF_USE_PAD BIT(28)
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+#define SSUSB_CTRL_REF_USE_PAD BIT(28)
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+#define SSUSB_CTRL_TEST_POWERDOWN BIT(26)
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+#define SSUSB_CTRL_TEST_POWERDOWN BIT(27)
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+#define SSUSB_CTRL_LANE0_PWR_PRESENT BIT(24)
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+#define SSUSB_CTRL_LANE0_PWR_PRESENT BIT(24)
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+#define SSUSB_CTRL_SS_PHY_EN BIT(8)
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+#define SSUSB_CTRL_SS_PHY_EN BIT(8)
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+#define SSUSB_CTRL_SS_PHY_RESET BIT(7)
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+#define SSUSB_CTRL_SS_PHY_RESET BIT(7)
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@ -331,14 +331,6 @@ Signed-off-by: Andy Gross <agross@codeaurora.org> |
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+
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+
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+ /* reset phy */
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+ /* reset phy */
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+ data = readl(phy_dwc3->base + SSUSB_PHY_CTRL_REG);
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+ data = readl(phy_dwc3->base + SSUSB_PHY_CTRL_REG);
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+
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+ /* Test and clear SSUSB_CTRL_TEST_POWERDOWN */
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+ if (data & SSUSB_CTRL_TEST_POWERDOWN) {
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+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
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+ SSUSB_CTRL_TEST_POWERDOWN, 0x0);
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+ data = readl(phy_dwc3->base + SSUSB_PHY_CTRL_REG);
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+ }
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+
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+ writel(data | SSUSB_CTRL_SS_PHY_RESET,
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+ writel(data | SSUSB_CTRL_SS_PHY_RESET,
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+ phy_dwc3->base + SSUSB_PHY_CTRL_REG);
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+ phy_dwc3->base + SSUSB_PHY_CTRL_REG);
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+ usleep_range(2000, 2200);
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+ usleep_range(2000, 2200);
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@ -428,7 +420,7 @@ Signed-off-by: Andy Gross <agross@codeaurora.org> |
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+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
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+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
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+ SSUSB_CTRL_REF_USE_PAD, 0x0);
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+ SSUSB_CTRL_REF_USE_PAD, 0x0);
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+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
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+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
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+ SSUSB_CTRL_TEST_POWERDOWN, SSUSB_CTRL_TEST_POWERDOWN);
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+ 0x0, SSUSB_CTRL_TEST_POWERDOWN);
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+
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+
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+ return 0;
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+ return 0;
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+}
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+}
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