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@ -11,6 +11,7 @@ |
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#include <linux/init.h> |
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#include <linux/init.h> |
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#include <linux/bitops.h> |
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#include <linux/bitops.h> |
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#include <linux/input.h> |
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#include <linux/platform_device.h> |
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#include <linux/platform_device.h> |
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#include <linux/spi/spi.h> |
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#include <linux/spi/spi.h> |
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#include <linux/spi/flash.h> |
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#include <linux/spi/flash.h> |
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@ -21,6 +22,11 @@ |
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#include "devices.h" |
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#include "devices.h" |
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#define PB42_BUTTONS_POLL_INTERVAL 20 |
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#define PB42_GPIO_BTN_SW4 8 |
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#define PB42_GPIO_BTN_SW5 3 |
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static struct spi_board_info pb42_spi_info[] = { |
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static struct spi_board_info pb42_spi_info[] = { |
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{ |
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{ |
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.bus_num = 0, |
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.bus_num = 0, |
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@ -46,6 +52,24 @@ static struct ar71xx_pci_irq pb42_pci_irqs[] __initdata = { |
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} |
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} |
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}; |
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}; |
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static struct gpio_button pb42_gpio_buttons[] __initdata = { |
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{ |
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.desc = "sw4", |
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.type = EV_KEY, |
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.code = BTN_0, |
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.threshold = 5, |
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.gpio = PB42_GPIO_BTN_SW4, |
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.active_low = 1, |
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} , { |
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.desc = "sw5", |
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.type = EV_KEY, |
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.code = BTN_1, |
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.threshold = 5, |
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.gpio = PB42_GPIO_BTN_SW5, |
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.active_low = 1, |
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} |
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}; |
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#define PB42_WAN_PHYMASK BIT(20) |
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#define PB42_WAN_PHYMASK BIT(20) |
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#define PB42_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) |
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#define PB42_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) |
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#define PB42_MDIO_PHYMASK (PB42_LAN_PHYMASK | PB42_WAN_PHYMASK) |
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#define PB42_MDIO_PHYMASK (PB42_LAN_PHYMASK | PB42_WAN_PHYMASK) |
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@ -68,6 +92,10 @@ static void __init pb42_init(void) |
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ar71xx_add_device_eth(0); |
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ar71xx_add_device_eth(0); |
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ar71xx_add_device_eth(1); |
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ar71xx_add_device_eth(1); |
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ar71xx_add_device_gpio_buttons(-1, PB42_BUTTONS_POLL_INTERVAL, |
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ARRAY_SIZE(pb42_gpio_buttons), |
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pb42_gpio_buttons); |
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ar71xx_pci_init(ARRAY_SIZE(pb42_pci_irqs), pb42_pci_irqs); |
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ar71xx_pci_init(ARRAY_SIZE(pb42_pci_irqs), pb42_pci_irqs); |
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} |
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} |
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