ar71xx: add backported watchdog patches

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 35879

target/linux/ar71xx/patches-3.8/039-watchdog-ath79_wdt-convert-to-use-devm_clk_get.patch

@@ -0,0 +1,51 @@
+From 7ddf72f2337b5f7790994df966c26cd1180e1585 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Thu, 27 Dec 2012 15:38:24 +0100
+Subject: [PATCH] watchdog: ath79_wdt: convert to use devm_clk_get
+
+commit 5071a88475b758bf60191e53606463fe7290c71e upstream.
+
+Use the managed version of clk_get. This allows to
+simplify the probe/remove functions a bit.
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
+---
+ drivers/watchdog/ath79_wdt.c |    7 ++-----
+ 1 file changed, 2 insertions(+), 5 deletions(-)
+
+--- a/drivers/watchdog/ath79_wdt.c
++++ b/drivers/watchdog/ath79_wdt.c
+@@ -229,13 +229,13 @@ static int ath79_wdt_probe(struct platfo
+ 	u32 ctrl;
+ 	int err;
+ 
+-	wdt_clk = clk_get(&pdev->dev, "wdt");
++	wdt_clk = devm_clk_get(&pdev->dev, "wdt");
+ 	if (IS_ERR(wdt_clk))
+ 		return PTR_ERR(wdt_clk);
+ 
+ 	err = clk_enable(wdt_clk);
+ 	if (err)
+-		goto err_clk_put;
++		return err;
+ 
+ 	wdt_freq = clk_get_rate(wdt_clk);
+ 	if (!wdt_freq) {
+@@ -265,8 +265,6 @@ static int ath79_wdt_probe(struct platfo
+ 
+ err_clk_disable:
+ 	clk_disable(wdt_clk);
+-err_clk_put:
+-	clk_put(wdt_clk);
+ 	return err;
+ }
+ 
+@@ -274,7 +272,6 @@ static int ath79_wdt_remove(struct platf
+ {
+ 	misc_deregister(&ath79_wdt_miscdev);
+ 	clk_disable(wdt_clk);
+-	clk_put(wdt_clk);
+ 	return 0;
+ }
+ 

target/linux/ar71xx/patches-3.8/040-MIPS-ath79-use-dynamically-allocated-watchdog-device.patch

@@ -0,0 +1,35 @@
+From 5e25d5207d21e65b5a2e58b64aba6804653e95b8 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Thu, 27 Dec 2012 15:38:25 +0100
+Subject: [PATCH] MIPS: ath79: use dynamically allocated watchdog device
+
+commit 0f2ad9ed7c6fecb008372e8a709595a2a21059aa upstream.
+
+Remove the static watchdog device variable and use
+the 'platform_device_register_simple' helper to
+allocate and register the device in one step.
+
+This allows us to save a few bytes in the kernel image.
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
+---
+ arch/mips/ath79/dev-common.c |    7 +------
+ 1 file changed, 1 insertion(+), 6 deletions(-)
+
+--- a/arch/mips/ath79/dev-common.c
++++ b/arch/mips/ath79/dev-common.c
+@@ -102,12 +102,7 @@ void __init ath79_register_uart(void)
+ 	}
+ }
+ 
+-static struct platform_device ath79_wdt_device = {
+-	.name		= "ath79-wdt",
+-	.id		= -1,
+-};
+-
+ void __init ath79_register_wdt(void)
+ {
+-	platform_device_register(&ath79_wdt_device);
++	platform_device_register_simple("ath79-wdt", -1, NULL, 0);
+ }

target/linux/ar71xx/patches-3.8/041-watchdog-ath79_wdt-get-register-base-from-platform-d.patch

@@ -0,0 +1,151 @@
+From 9c0785757dacd1aaf9e6e58b4f559e345093f1d4 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Thu, 27 Dec 2012 15:38:26 +0100
+Subject: [PATCH] watchdog: ath79_wdt: get register base from platform
+ device's resources
+
+commit 09f5100a592d11dad06b218f41d560ff1f87f666 upstream.
+
+The ath79_wdt driver uses a fixed memory address
+currently. Although this is working with each
+currently supported SoCs, but this may change
+in the future. Additionally, the driver includes
+platform specific header files in order to be
+able to get the memory base of the watchdog
+device.
+
+The patch adds a memory resource to the platform
+device, and converts the driver to get the base
+address of the watchdog device from that.
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
+---
+ arch/mips/ath79/dev-common.c |   10 ++++++++-
+ drivers/watchdog/ath79_wdt.c |   48 +++++++++++++++++++++++++++++++++---------
+ 2 files changed, 47 insertions(+), 11 deletions(-)
+
+--- a/arch/mips/ath79/dev-common.c
++++ b/arch/mips/ath79/dev-common.c
+@@ -104,5 +104,13 @@ void __init ath79_register_uart(void)
+ 
+ void __init ath79_register_wdt(void)
+ {
+-	platform_device_register_simple("ath79-wdt", -1, NULL, 0);
++	struct resource res;
++
++	memset(&res, 0, sizeof(res));
++
++	res.flags = IORESOURCE_MEM;
++	res.start = AR71XX_RESET_BASE + AR71XX_RESET_REG_WDOG_CTRL;
++	res.end = res.start + 0x8 - 1;
++
++	platform_device_register_simple("ath79-wdt", -1, &res, 1);
+ }
+--- a/drivers/watchdog/ath79_wdt.c
++++ b/drivers/watchdog/ath79_wdt.c
+@@ -23,6 +23,7 @@
+ #include <linux/errno.h>
+ #include <linux/fs.h>
+ #include <linux/init.h>
++#include <linux/io.h>
+ #include <linux/kernel.h>
+ #include <linux/miscdevice.h>
+ #include <linux/module.h>
+@@ -33,13 +34,13 @@
+ #include <linux/clk.h>
+ #include <linux/err.h>
+ 
+-#include <asm/mach-ath79/ath79.h>
+-#include <asm/mach-ath79/ar71xx_regs.h>
+-
+ #define DRIVER_NAME	"ath79-wdt"
+ 
+ #define WDT_TIMEOUT	15	/* seconds */
+ 
++#define WDOG_REG_CTRL		0x00
++#define WDOG_REG_TIMER		0x04
++
+ #define WDOG_CTRL_LAST_RESET	BIT(31)
+ #define WDOG_CTRL_ACTION_MASK	3
+ #define WDOG_CTRL_ACTION_NONE	0	/* no action */
+@@ -66,27 +67,38 @@ static struct clk *wdt_clk;
+ static unsigned long wdt_freq;
+ static int boot_status;
+ static int max_timeout;
++static void __iomem *wdt_base;
++
++static inline void ath79_wdt_wr(unsigned reg, u32 val)
++{
++	iowrite32(val, wdt_base + reg);
++}
++
++static inline u32 ath79_wdt_rr(unsigned reg)
++{
++	return ioread32(wdt_base + reg);
++}
+ 
+ static inline void ath79_wdt_keepalive(void)
+ {
+-	ath79_reset_wr(AR71XX_RESET_REG_WDOG, wdt_freq * timeout);
++	ath79_wdt_wr(WDOG_REG_TIMER, wdt_freq * timeout);
+ 	/* flush write */
+-	ath79_reset_rr(AR71XX_RESET_REG_WDOG);
++	ath79_wdt_rr(WDOG_REG_TIMER);
+ }
+ 
+ static inline void ath79_wdt_enable(void)
+ {
+ 	ath79_wdt_keepalive();
+-	ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_FCR);
++	ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_FCR);
+ 	/* flush write */
+-	ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
++	ath79_wdt_rr(WDOG_REG_CTRL);
+ }
+ 
+ static inline void ath79_wdt_disable(void)
+ {
+-	ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_NONE);
++	ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_NONE);
+ 	/* flush write */
+-	ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
++	ath79_wdt_rr(WDOG_REG_CTRL);
+ }
+ 
+ static int ath79_wdt_set_timeout(int val)
+@@ -226,9 +238,25 @@ static struct miscdevice ath79_wdt_miscd
+ 
+ static int ath79_wdt_probe(struct platform_device *pdev)
+ {
++	struct resource *res;
+ 	u32 ctrl;
+ 	int err;
+ 
++	if (wdt_base)
++		return -EBUSY;
++
++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res) {
++		dev_err(&pdev->dev, "no memory resource found\n");
++		return -EINVAL;
++	}
++
++	wdt_base = devm_request_and_ioremap(&pdev->dev, res);
++	if (!wdt_base) {
++		dev_err(&pdev->dev, "unable to remap memory region\n");
++		return -ENOMEM;
++	}
++
+ 	wdt_clk = devm_clk_get(&pdev->dev, "wdt");
+ 	if (IS_ERR(wdt_clk))
+ 		return PTR_ERR(wdt_clk);
+@@ -251,7 +279,7 @@ static int ath79_wdt_probe(struct platfo
+ 			max_timeout, timeout);
+ 	}
+ 
+-	ctrl = ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
++	ctrl = ath79_wdt_rr(WDOG_REG_CTRL);
+ 	boot_status = (ctrl & WDOG_CTRL_LAST_RESET) ? WDIOF_CARDRESET : 0;
+ 
+ 	err = misc_register(&ath79_wdt_miscdev);