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@ -153,6 +153,54 @@ void ar71xx_device_start(u32 mask) |
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} |
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} |
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EXPORT_SYMBOL_GPL(ar71xx_device_start); |
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EXPORT_SYMBOL_GPL(ar71xx_device_start); |
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void ar71xx_device_reset_rmw(u32 clear, u32 set) |
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{ |
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unsigned long flags; |
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unsigned int reg; |
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u32 t; |
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switch (ar71xx_soc) { |
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case AR71XX_SOC_AR7130: |
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case AR71XX_SOC_AR7141: |
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case AR71XX_SOC_AR7161: |
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reg = AR71XX_RESET_REG_RESET_MODULE; |
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break; |
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case AR71XX_SOC_AR7240: |
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case AR71XX_SOC_AR7241: |
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case AR71XX_SOC_AR7242: |
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reg = AR724X_RESET_REG_RESET_MODULE; |
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break; |
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case AR71XX_SOC_AR9130: |
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case AR71XX_SOC_AR9132: |
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reg = AR91XX_RESET_REG_RESET_MODULE; |
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break; |
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case AR71XX_SOC_AR9330: |
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case AR71XX_SOC_AR9331: |
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reg = AR933X_RESET_REG_RESET_MODULE; |
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break; |
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case AR71XX_SOC_AR9341: |
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case AR71XX_SOC_AR9342: |
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case AR71XX_SOC_AR9344: |
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reg = AR934X_RESET_REG_RESET_MODULE; |
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break; |
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default: |
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BUG(); |
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} |
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spin_lock_irqsave(&ar71xx_device_lock, flags); |
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t = ar71xx_reset_rr(reg); |
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t &= ~clear; |
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t |= set; |
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ar71xx_reset_wr(reg, t); |
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spin_unlock_irqrestore(&ar71xx_device_lock, flags); |
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} |
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EXPORT_SYMBOL_GPL(ar71xx_device_reset_rmw); |
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int ar71xx_device_stopped(u32 mask) |
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int ar71xx_device_stopped(u32 mask) |
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{ |
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{ |
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unsigned long flags; |
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unsigned long flags; |
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