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@ -70,6 +70,8 @@ |
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#define RTL8366RB_PHY_NO_OFFSET 9 |
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#define RTL8366RB_PHY_NO_OFFSET 9 |
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#define RTL8366RB_PHY_NO_MASK (0x1f << 9) |
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#define RTL8366RB_PHY_NO_MASK (0x1f << 9) |
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#define RTL8366RB_VLAN_INGRESS_CTRL2_REG 0x037f |
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/* LED control registers */ |
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/* LED control registers */ |
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#define RTL8366RB_LED_BLINKRATE_REG 0x0430 |
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#define RTL8366RB_LED_BLINKRATE_REG 0x0430 |
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#define RTL8366RB_LED_BLINKRATE_BIT 0 |
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#define RTL8366RB_LED_BLINKRATE_BIT 0 |
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@ -288,6 +290,12 @@ static int rtl8366rb_hw_init(struct rtl8366_smi *smi) |
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/* disable auto ageing for all ports */ |
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/* disable auto ageing for all ports */ |
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REG_WR(smi, RTL8366RB_SSCR1, RTL8366RB_PORT_ALL); |
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REG_WR(smi, RTL8366RB_SSCR1, RTL8366RB_PORT_ALL); |
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/*
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* discard VLAN tagged packets if the port is not a member of |
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* the VLAN with which the packets is associated. |
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*/ |
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REG_WR(smi, RTL8366RB_VLAN_INGRESS_CTRL2_REG, RTL8366RB_PORT_ALL); |
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/* don't drop packets whose DA has not been learned */ |
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/* don't drop packets whose DA has not been learned */ |
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REG_RMW(smi, RTL8366RB_SSCR2, RTL8366RB_SSCR2_DROP_UNKNOWN_DA, 0); |
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REG_RMW(smi, RTL8366RB_SSCR2, RTL8366RB_SSCR2_DROP_UNKNOWN_DA, 0); |
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