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@ -1,8 +1,8 @@ |
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/*
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/*
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* $Id$ |
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* $Id$ |
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*
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* |
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* Copyright (C) 2006, 2007 OpenWrt.org |
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* Copyright (C) 2006, 2007 OpenWrt.org |
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*
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* |
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* Carsten Langgaard, carstenl@mips.com |
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* Carsten Langgaard, carstenl@mips.com |
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* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. |
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* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. |
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* |
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* |
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@ -20,26 +20,12 @@ |
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. |
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. |
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*/ |
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*/ |
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#include <linux/init.h> |
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#include <linux/init.h> |
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#include <linux/sched.h> |
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#include <linux/ioport.h> |
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#include <linux/ioport.h> |
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#include <linux/pci.h> |
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#include <linux/tty.h> |
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#include <linux/pm.h> |
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#include <linux/pm.h> |
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#include <linux/serial_8250.h> |
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#include <linux/serial_core.h> |
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#include <linux/serial.h> |
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#include <linux/serial_reg.h> |
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#include <asm/cpu.h> |
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#include <asm/irq.h> |
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#include <asm/mips-boards/generic.h> |
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#include <asm/mips-boards/prom.h> |
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#include <asm/mips-boards/prom.h> |
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#include <asm/dma.h> |
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#include <asm/time.h> |
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#include <asm/traps.h> |
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#include <asm/io.h> |
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#include <asm/reboot.h> |
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#include <asm/reboot.h> |
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#include <asm/gdb-stub.h> |
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#include <asm/time.h> |
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#include <asm/ar7/ar7.h> |
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#include <asm/ar7/ar7.h> |
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extern void ar7_time_init(void); |
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extern void ar7_time_init(void); |
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@ -49,9 +35,9 @@ static void ar7_machine_power_off(void); |
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static void ar7_machine_restart(char *command) |
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static void ar7_machine_restart(char *command) |
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{ |
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{ |
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volatile u32 *softres_reg = (u32 *)ioremap(AR7_REGS_RESET + |
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u32 *softres_reg = (u32 *)ioremap(AR7_REGS_RESET + |
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AR7_RESET_SOFTWARE, 1); |
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AR7_RESET_SOFTWARE, 1); |
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*softres_reg = 1; |
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writel(1, softres_reg); |
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} |
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} |
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static void ar7_machine_halt(void) |
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static void ar7_machine_halt(void) |
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@ -61,9 +47,9 @@ static void ar7_machine_halt(void) |
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static void ar7_machine_power_off(void) |
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static void ar7_machine_power_off(void) |
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{ |
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{ |
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volatile u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1); |
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u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1); |
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u32 power_state = *power_reg | (3 << 30); |
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u32 power_state = readl(power_reg) | (3 << 30); |
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*power_reg = power_state; |
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writel(power_state, power_reg); |
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ar7_machine_halt(); |
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ar7_machine_halt(); |
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} |
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} |
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@ -109,7 +95,6 @@ void __init plat_mem_setup(void) |
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set_io_port_base(io_base); |
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set_io_port_base(io_base); |
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prom_meminit(); |
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prom_meminit(); |
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#warning FIXME: clock initialisation |
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ar7_init_clocks(); |
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ar7_init_clocks(); |
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ioport_resource.start = 0; |
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ioport_resource.start = 0; |
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