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ramips: make the mt7628 spi driver work for both cs lines

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Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 46951
master
John Crispin 9 years ago
parent 6f07b8a659
commit 710520d5c7
1 changed files with 7 additions and 8 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 15
      target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch

15
target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
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@ -1,6 +1,6 @@
--- a/drivers/spi/Kconfig --- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig
@@ -439,6 +439,12 @@ config SPI_RT2880 @@ -439,6 +439,12 @@
help help
This selects a driver for the Ralink RT288x/RT305x SPI Controller. This selects a driver for the Ralink RT288x/RT305x SPI Controller.
@ -15,7 +15,7 @@
depends on ARCH_S3C24XX depends on ARCH_S3C24XX
--- a/drivers/spi/Makefile --- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile +++ b/drivers/spi/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70l @@ -46,6 +46,7 @@
obj-$(CONFIG_SPI_MPC512x_PSC) += spi-mpc512x-psc.o obj-$(CONFIG_SPI_MPC512x_PSC) += spi-mpc512x-psc.o
obj-$(CONFIG_SPI_MPC52xx_PSC) += spi-mpc52xx-psc.o obj-$(CONFIG_SPI_MPC52xx_PSC) += spi-mpc52xx-psc.o
obj-$(CONFIG_SPI_MPC52xx) += spi-mpc52xx.o obj-$(CONFIG_SPI_MPC52xx) += spi-mpc52xx.o
@ -25,7 +25,7 @@
obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
--- /dev/null --- /dev/null
+++ b/drivers/spi/spi-mt7621.c +++ b/drivers/spi/spi-mt7621.c
@@ -0,0 +1,315 @@ @@ -0,0 +1,314 @@
+/* +/*
+ * spi-mt7621.c -- MediaTek MT7621 SPI controller driver + * spi-mt7621.c -- MediaTek MT7621 SPI controller driver
+ * + *
@ -111,12 +111,11 @@
+static void mt7621_spi_set_cs(struct spi_device *spi, int enable) +static void mt7621_spi_set_cs(struct spi_device *spi, int enable)
+{ +{
+ struct mt7621_spi *rs = spidev_to_mt7621_spi(spi); + struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
+ u32 polar = mt7621_spi_read(rs, MT7621_SPI_POLAR); + int cs = spi->chip_select;
+ u32 polar = 0;
+ +
+ if (enable) + if (enable)
+ polar |= 1; + polar = BIT(cs);
+ else
+ polar &= ~1;
+ mt7621_spi_write(rs, MT7621_SPI_POLAR, polar); + mt7621_spi_write(rs, MT7621_SPI_POLAR, polar);
+} +}
+ +
@ -290,7 +289,7 @@
+ master->transfer_one_message = mt7621_spi_transfer_one_message; + master->transfer_one_message = mt7621_spi_transfer_one_message;
+ master->bits_per_word_mask = SPI_BPW_MASK(8); + master->bits_per_word_mask = SPI_BPW_MASK(8);
+ master->dev.of_node = pdev->dev.of_node; + master->dev.of_node = pdev->dev.of_node;
+ master->num_chipselect = 1; + master->num_chipselect = 2;
+ +
+ dev_set_drvdata(&pdev->dev, master); + dev_set_drvdata(&pdev->dev, master);
+ +

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