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@ -41,7 +41,7 @@ Acked-by: John Crispin <blogic@openwrt.org> |
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spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o
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--- /dev/null
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+++ b/drivers/spi/spi-rt2880.c
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@@ -0,0 +1,493 @@
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@@ -0,0 +1,480 @@
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+/*
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+ * spi-rt2880.c -- Ralink RT288x/RT305x SPI controller driver
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+ *
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@ -174,7 +174,6 @@ Acked-by: John Crispin <blogic@openwrt.org> |
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+ unsigned int sys_freq;
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+ unsigned int speed;
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+ struct clk *clk;
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+ spinlock_t lock;
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+};
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+
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+static inline struct rt2880_spi *spidev_to_rt2880_spi(struct spi_device *spi)
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@ -187,7 +186,8 @@ Acked-by: John Crispin <blogic@openwrt.org> |
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+ return ioread32(rs->base + reg);
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+}
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+
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+static inline void rt2880_spi_write(struct rt2880_spi *rs, u32 reg, u32 val)
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+static inline void rt2880_spi_write(struct rt2880_spi *rs, u32 reg,
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+ const u32 val)
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+{
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+ iowrite32(val, rs->base + reg);
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+}
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@ -195,27 +195,15 @@ Acked-by: John Crispin <blogic@openwrt.org> |
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+static inline void rt2880_spi_setbits(struct rt2880_spi *rs, u32 reg, u32 mask)
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+{
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+ void __iomem *addr = rs->base + reg;
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+ unsigned long flags;
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+ u32 val;
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+
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+ spin_lock_irqsave(&rs->lock, flags);
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+ val = ioread32(addr);
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+ val |= mask;
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+ iowrite32(val, addr);
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+ spin_unlock_irqrestore(&rs->lock, flags);
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+ iowrite32((ioread32(addr) | mask), addr);
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+}
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+
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+static inline void rt2880_spi_clrbits(struct rt2880_spi *rs, u32 reg, u32 mask)
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+{
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+ void __iomem *addr = rs->base + reg;
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+ unsigned long flags;
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+ u32 val;
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+
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+ spin_lock_irqsave(&rs->lock, flags);
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+ val = ioread32(addr);
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+ val &= ~mask;
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+ iowrite32(val, addr);
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+ spin_unlock_irqrestore(&rs->lock, flags);
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+ iowrite32((ioread32(addr) & ~mask), addr);
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+}
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+
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+static int rt2880_spi_baudrate_set(struct spi_device *spi, unsigned int speed)
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@ -488,7 +476,6 @@ Acked-by: John Crispin <blogic@openwrt.org> |
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+ rs->master = master;
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+ rs->sys_freq = clk_get_rate(rs->clk);
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+ dev_dbg(&pdev->dev, "sys_freq: %u\n", rs->sys_freq);
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+ spin_lock_irqsave(&rs->lock, flags);
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+
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+ device_reset(&pdev->dev);
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+
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