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@ -1,16 +1,43 @@ |
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From 1b0b5d325d0cc50cade62afd6a9416fb3cd1e658 Mon Sep 17 00:00:00 2001
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From fb7e08ec47f7168b8f4f72d8e3b5bcf625e1089e Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jogo@openwrt.org>
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From: Florian Fainelli <florian@openwrt.org>
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Date: Mon, 7 Jan 2013 17:42:45 +0100
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Date: Wed, 12 Jun 2013 18:53:05 +0000
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Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch
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Subject: [PATCH] bcm63xx_enet: add support Broadcom BCM6345 Ethernet
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This patch adds support for the Broadcom BCM6345 SoC Ethernet. BCM6345
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has a slightly different and older DMA engine which requires the
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following modifications:
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- the width of the DMA channels on BCM6345 is 64 bytes vs 16 bytes,
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which means that the helpers enet_dma{c,s} need to account for this
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channel width and we can no longer use macros
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- BCM6345 DMA engine does not have any internal SRAM for transfering
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buffers
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- BCM6345 buffer allocation and flow control is not per-channel but
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global (done in RSET_ENETDMA)
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- the DMA engine bits are right-shifted by 3 compared to other DMA
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generations
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- the DMA enable/interrupt masks are a little different (we need to
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enabled more bits for 6345)
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- some register have the same meaning but are offsetted in the ENET_DMAC
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space so a lookup table is required to return the proper offset
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The MAC itself is identical and requires no modifications to work.
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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Acked-by: Ralf Baechle <ralf@linux-mips.org>
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---
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---
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arch/mips/bcm63xx/dev-enet.c | 63 ++++++-
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arch/mips/bcm63xx/dev-enet.c | 65 ++++++-
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arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +-
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arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +-
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.../include/asm/mach-bcm63xx/bcm63xx_dev_enet.h | 88 +++++++++
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.../include/asm/mach-bcm63xx/bcm63xx_dev_enet.h | 94 +++++++++
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arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 43 ++++-
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arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 43 ++++-
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drivers/net/ethernet/broadcom/bcm63xx_enet.c | 199 ++++++++++++--------
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drivers/net/ethernet/broadcom/bcm63xx_enet.c | 200 ++++++++++++--------
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drivers/net/ethernet/broadcom/bcm63xx_enet.h | 15 ++
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drivers/net/ethernet/broadcom/bcm63xx_enet.h | 15 ++
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6 files changed, 320 insertions(+), 91 deletions(-)
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6 files changed, 329 insertions(+), 91 deletions(-)
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--- a/arch/mips/bcm63xx/dev-enet.c
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--- a/arch/mips/bcm63xx/dev-enet.c
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+++ b/arch/mips/bcm63xx/dev-enet.c
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+++ b/arch/mips/bcm63xx/dev-enet.c
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@ -24,7 +51,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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#include <bcm63xx_regs.h>
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#include <bcm63xx_regs.h>
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+#ifdef BCMCPU_RUNTIME_DETECT
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+#ifdef BCMCPU_RUNTIME_DETECT
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+static const unsigned long bcm6xxx_regs_enetdmac[] = {
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+static const unsigned long bcm6348_regs_enetdmac[] = {
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+ [ENETDMAC_CHANCFG] = ENETDMAC_CHANCFG_REG,
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+ [ENETDMAC_CHANCFG] = ENETDMAC_CHANCFG_REG,
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+ [ENETDMAC_IR] = ENETDMAC_IR_REG,
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+ [ENETDMAC_IR] = ENETDMAC_IR_REG,
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+ [ENETDMAC_IRMASK] = ENETDMAC_IRMASK_REG,
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+ [ENETDMAC_IRMASK] = ENETDMAC_IRMASK_REG,
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@ -50,7 +77,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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+ if (BCMCPU_IS_6345())
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+ if (BCMCPU_IS_6345())
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+ bcm63xx_regs_enetdmac = bcm6345_regs_enetdmac;
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+ bcm63xx_regs_enetdmac = bcm6345_regs_enetdmac;
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+ else
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+ else
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+ bcm63xx_regs_enetdmac = bcm6xxx_regs_enetdmac;
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+ bcm63xx_regs_enetdmac = bcm6348_regs_enetdmac;
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+}
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+}
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+#else
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+#else
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+static __init void bcm63xx_enetdmac_regs_init(void) { }
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+static __init void bcm63xx_enetdmac_regs_init(void) { }
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@ -59,7 +86,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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static struct resource shared_res[] = {
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static struct resource shared_res[] = {
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{
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{
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.start = -1, /* filled at runtime */
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.start = -1, /* filled at runtime */
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@@ -137,9 +171,14 @@ static int __init register_shared(void)
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@@ -137,12 +171,19 @@ static int __init register_shared(void)
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if (shared_device_registered)
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if (shared_device_registered)
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return 0;
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return 0;
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@ -75,7 +102,12 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
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if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
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chan_count = 32;
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chan_count = 32;
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@@ -172,7 +211,7 @@ int __init bcm63xx_enet_register(int uni
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+ else if (BCMCPU_IS_6345())
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+ chan_count = 8;
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else
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chan_count = 16;
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@@ -172,7 +213,7 @@ int __init bcm63xx_enet_register(int uni
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if (unit > 1)
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if (unit > 1)
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return -ENODEV;
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return -ENODEV;
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@ -84,7 +116,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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return -ENODEV;
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return -ENODEV;
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ret = register_shared();
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ret = register_shared();
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@@ -213,6 +252,20 @@ int __init bcm63xx_enet_register(int uni
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@@ -213,6 +254,21 @@ int __init bcm63xx_enet_register(int uni
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dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY);
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dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY);
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}
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}
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@ -97,18 +129,20 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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+ dpd->dma_chan_int_mask |= ENETDMA_IR_BUFDONE_MASK;
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+ dpd->dma_chan_int_mask |= ENETDMA_IR_BUFDONE_MASK;
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+ dpd->dma_chan_int_mask |= ENETDMA_IR_NOTOWNER_MASK;
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+ dpd->dma_chan_int_mask |= ENETDMA_IR_NOTOWNER_MASK;
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+ dpd->dma_chan_width = ENETDMA_6345_CHAN_WIDTH;
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+ dpd->dma_chan_width = ENETDMA_6345_CHAN_WIDTH;
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+ dpd->dma_no_sram = 1;
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+ dpd->dma_desc_shift = ENETDMA_6345_DESC_SHIFT;
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+ dpd->dma_desc_shift = ENETDMA_6345_DESC_SHIFT;
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+ } else
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+ } else {
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+ dpd->dma_has_sram = true;
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+ dpd->dma_chan_width = ENETDMA_CHAN_WIDTH;
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+ dpd->dma_chan_width = ENETDMA_CHAN_WIDTH;
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+ }
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+
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+
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ret = platform_device_register(pdev);
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ret = platform_device_register(pdev);
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if (ret)
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if (ret)
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return ret;
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return ret;
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@@ -246,6 +299,10 @@ bcm63xx_enetsw_register(const struct bcm
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@@ -246,6 +302,11 @@ bcm63xx_enetsw_register(const struct bcm
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else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
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else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
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enetsw_pd.num_ports = ENETSW_PORTS_6368;
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enetsw_pd.num_ports = ENETSW_PORTS_6368;
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+ enetsw_pd.dma_has_sram = true;
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+ enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
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+ enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
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+ enetsw_pd.dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK;
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+ enetsw_pd.dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK;
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+ enetsw_pd.dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK;
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+ enetsw_pd.dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK;
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@ -118,7 +152,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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return ret;
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return ret;
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
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@@ -175,6 +175,7 @@ enum bcm63xx_regs_set {
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@@ -188,6 +188,7 @@ enum bcm63xx_regs_set {
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#define BCM_6368_RSET_SPI_SIZE 1804
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#define BCM_6368_RSET_SPI_SIZE 1804
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#define RSET_ENET_SIZE 2048
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#define RSET_ENET_SIZE 2048
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#define RSET_ENETDMA_SIZE 256
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#define RSET_ENETDMA_SIZE 256
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@ -126,7 +160,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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#define RSET_ENETDMAC_SIZE(chans) (16 * (chans))
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#define RSET_ENETDMAC_SIZE(chans) (16 * (chans))
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#define RSET_ENETDMAS_SIZE(chans) (16 * (chans))
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#define RSET_ENETDMAS_SIZE(chans) (16 * (chans))
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#define RSET_ENETSW_SIZE 65536
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#define RSET_ENETSW_SIZE 65536
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@@ -305,7 +306,7 @@ enum bcm63xx_regs_set {
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@@ -363,7 +364,7 @@ enum bcm63xx_regs_set {
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#define BCM_6345_USBDMA_BASE (0xfffe2800)
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#define BCM_6345_USBDMA_BASE (0xfffe2800)
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#define BCM_6345_ENET0_BASE (0xfffe1800)
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#define BCM_6345_ENET0_BASE (0xfffe1800)
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#define BCM_6345_ENETDMA_BASE (0xfffe2800)
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#define BCM_6345_ENETDMA_BASE (0xfffe2800)
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@ -157,8 +191,8 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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+ /* DMA channel interrupt mask */
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+ /* DMA channel interrupt mask */
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+ u32 dma_chan_int_mask;
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+ u32 dma_chan_int_mask;
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+
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+
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+ /* Set to one if DMA engine has *no* SRAM */
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+ /* DMA engine has internal SRAM */
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+ unsigned int dma_no_sram;
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+ bool dma_has_sram;
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+
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+
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+ /* DMA channel register width */
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+ /* DMA channel register width */
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+ unsigned int dma_chan_width;
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+ unsigned int dma_chan_width;
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@ -168,7 +202,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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};
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};
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/*
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/*
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@@ -63,6 +80,15 @@ struct bcm63xx_enetsw_platform_data {
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@@ -63,6 +80,18 @@ struct bcm63xx_enetsw_platform_data {
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char mac_addr[ETH_ALEN];
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char mac_addr[ETH_ALEN];
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int num_ports;
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int num_ports;
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struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
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struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
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@ -181,10 +215,13 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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+
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+
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+ /* DMA channel register width */
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+ /* DMA channel register width */
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+ unsigned int dma_chan_width;
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+ unsigned int dma_chan_width;
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+
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+ /* DMA engine has internal SRAM */
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+ bool dma_has_sram;
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};
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};
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int __init bcm63xx_enet_register(int unit,
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int __init bcm63xx_enet_register(int unit,
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@@ -70,4 +96,69 @@ int __init bcm63xx_enet_register(int uni
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@@ -70,4 +99,69 @@ int __init bcm63xx_enet_register(int uni
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int bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd);
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int bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd);
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@ -256,7 +293,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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#endif /* ! BCM63XX_DEV_ENET_H_ */
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#endif /* ! BCM63XX_DEV_ENET_H_ */
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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@@ -730,6 +730,8 @@
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@@ -770,6 +770,8 @@
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/*************************************************************************
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/*************************************************************************
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* _REG relative to RSET_ENETDMA
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* _REG relative to RSET_ENETDMA
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*************************************************************************/
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*************************************************************************/
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@ -265,7 +302,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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/* Controller Configuration Register */
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/* Controller Configuration Register */
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#define ENETDMA_CFG_REG (0x0)
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#define ENETDMA_CFG_REG (0x0)
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@@ -785,31 +787,56 @@
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@@ -825,31 +827,56 @@
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/* State Ram Word 4 */
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/* State Ram Word 4 */
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#define ENETDMA_SRAM4_REG(x) (0x20c + (x) * 0x10)
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#define ENETDMA_SRAM4_REG(x) (0x20c + (x) * 0x10)
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@ -326,7 +363,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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/*************************************************************************
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/*************************************************************************
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@@ -817,16 +844,16 @@
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@@ -857,16 +884,16 @@
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*************************************************************************/
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*************************************************************************/
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/* Ring Start Address register */
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/* Ring Start Address register */
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@ -349,7 +386,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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/*************************************************************************
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/*************************************************************************
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--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
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--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
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+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
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+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
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@@ -115,26 +115,28 @@ static inline void enet_dma_writel(struc
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@@ -107,26 +107,28 @@ static inline void enet_dma_writel(struc
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bcm_writel(val, bcm_enet_shared_base[0] + off);
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bcm_writel(val, bcm_enet_shared_base[0] + off);
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}
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}
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@ -358,7 +395,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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{
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{
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- return bcm_readl(bcm_enet_shared_base[1] + off);
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- return bcm_readl(bcm_enet_shared_base[1] + off);
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+ return bcm_readl(bcm_enet_shared_base[1] +
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+ return bcm_readl(bcm_enet_shared_base[1] +
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+ (bcm63xx_enetdmacreg(off) + (chan * priv->dma_chan_width)));
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+ bcm63xx_enetdmacreg(off) + chan * priv->dma_chan_width);
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}
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}
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static inline void enet_dmac_writel(struct bcm_enet_priv *priv,
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static inline void enet_dmac_writel(struct bcm_enet_priv *priv,
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@ -367,14 +404,14 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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{
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{
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- bcm_writel(val, bcm_enet_shared_base[1] + off);
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- bcm_writel(val, bcm_enet_shared_base[1] + off);
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+ bcm_writel(val, bcm_enet_shared_base[1] +
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+ bcm_writel(val, bcm_enet_shared_base[1] +
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+ (bcm63xx_enetdmacreg(off) + (chan * priv->dma_chan_width)));
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+ bcm63xx_enetdmacreg(off) + chan * priv->dma_chan_width);
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}
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}
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-static inline u32 enet_dmas_readl(struct bcm_enet_priv *priv, u32 off)
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-static inline u32 enet_dmas_readl(struct bcm_enet_priv *priv, u32 off)
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+static inline u32 enet_dmas_readl(struct bcm_enet_priv *priv, u32 off, int chan)
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+static inline u32 enet_dmas_readl(struct bcm_enet_priv *priv, u32 off, int chan)
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{
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{
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- return bcm_readl(bcm_enet_shared_base[2] + off);
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- return bcm_readl(bcm_enet_shared_base[2] + off);
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+ return bcm_readl(bcm_enet_shared_base[2] + (off + (chan * priv->dma_chan_width)));
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+ return bcm_readl(bcm_enet_shared_base[2] + off + chan * priv->dma_chan_width);
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}
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}
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static inline void enet_dmas_writel(struct bcm_enet_priv *priv,
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static inline void enet_dmas_writel(struct bcm_enet_priv *priv,
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@ -382,11 +419,11 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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+ u32 val, u32 off, int chan)
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+ u32 val, u32 off, int chan)
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{
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{
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- bcm_writel(val, bcm_enet_shared_base[2] + off);
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- bcm_writel(val, bcm_enet_shared_base[2] + off);
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+ bcm_writel(val, bcm_enet_shared_base[2] + (off + (chan * priv->dma_chan_width)));
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+ bcm_writel(val, bcm_enet_shared_base[2] + off + chan * priv->dma_chan_width);
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}
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}
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/*
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/*
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@@ -270,7 +272,7 @@ static int bcm_enet_refill_rx(struct net
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@@ -262,7 +264,7 @@ static int bcm_enet_refill_rx(struct net
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len_stat = priv->rx_skb_size << DMADESC_LENGTH_SHIFT;
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len_stat = priv->rx_skb_size << DMADESC_LENGTH_SHIFT;
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len_stat |= DMADESC_OWNER_MASK;
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len_stat |= DMADESC_OWNER_MASK;
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if (priv->rx_dirty_desc == priv->rx_ring_size - 1) {
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if (priv->rx_dirty_desc == priv->rx_ring_size - 1) {
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@ -395,19 +432,19 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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priv->rx_dirty_desc = 0;
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priv->rx_dirty_desc = 0;
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} else {
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} else {
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priv->rx_dirty_desc++;
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priv->rx_dirty_desc++;
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@@ -281,7 +283,10 @@ static int bcm_enet_refill_rx(struct net
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@@ -273,7 +275,10 @@ static int bcm_enet_refill_rx(struct net
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priv->rx_desc_count++;
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priv->rx_desc_count++;
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/* tell dma engine we allocated one buffer */
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/* tell dma engine we allocated one buffer */
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- enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));
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- enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));
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+ if (!priv->dma_no_sram)
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+ if (priv->dma_has_sram)
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+ enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));
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+ enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));
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+ else
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+ else
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+ enet_dmac_writel(priv, 1, ENETDMAC_BUFALLOC, priv->rx_chan);
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+ enet_dmac_writel(priv, 1, ENETDMAC_BUFALLOC, priv->rx_chan);
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}
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}
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/* If rx ring is still empty, set a timer to try allocating
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/* If rx ring is still empty, set a timer to try allocating
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@@ -357,7 +362,8 @@ static int bcm_enet_receive_queue(struct
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@@ -349,7 +354,8 @@ static int bcm_enet_receive_queue(struct
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/* if the packet does not have start of packet _and_
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/* if the packet does not have start of packet _and_
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* end of packet flag set, then just recycle it */
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* end of packet flag set, then just recycle it */
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@ -417,7 +454,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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dev->stats.rx_dropped++;
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dev->stats.rx_dropped++;
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continue;
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continue;
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}
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}
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@@ -418,8 +424,8 @@ static int bcm_enet_receive_queue(struct
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@@ -410,8 +416,8 @@ static int bcm_enet_receive_queue(struct
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bcm_enet_refill_rx(dev);
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bcm_enet_refill_rx(dev);
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/* kick rx dma */
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/* kick rx dma */
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@ -428,7 +465,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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}
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}
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return processed;
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return processed;
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@@ -494,10 +500,10 @@ static int bcm_enet_poll(struct napi_str
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@@ -486,10 +492,10 @@ static int bcm_enet_poll(struct napi_str
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dev = priv->net_dev;
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dev = priv->net_dev;
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/* ack interrupts */
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/* ack interrupts */
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@ -443,7 +480,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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/* reclaim sent skb */
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/* reclaim sent skb */
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tx_work_done = bcm_enet_tx_reclaim(dev, 0);
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tx_work_done = bcm_enet_tx_reclaim(dev, 0);
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@@ -516,10 +522,10 @@ static int bcm_enet_poll(struct napi_str
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@@ -508,10 +514,10 @@ static int bcm_enet_poll(struct napi_str
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napi_complete(napi);
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napi_complete(napi);
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/* restore rx/tx interrupt */
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/* restore rx/tx interrupt */
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@ -458,7 +495,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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return rx_work_done;
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return rx_work_done;
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}
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}
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@@ -562,8 +568,8 @@ static irqreturn_t bcm_enet_isr_dma(int
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@@ -554,8 +560,8 @@ static irqreturn_t bcm_enet_isr_dma(int
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priv = netdev_priv(dev);
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priv = netdev_priv(dev);
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/* mask rx/tx interrupts */
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/* mask rx/tx interrupts */
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@ -469,7 +506,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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napi_schedule(&priv->napi);
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napi_schedule(&priv->napi);
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@@ -624,14 +630,14 @@ static int bcm_enet_start_xmit(struct sk
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@@ -616,14 +622,14 @@ static int bcm_enet_start_xmit(struct sk
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DMA_TO_DEVICE);
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DMA_TO_DEVICE);
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len_stat = (skb->len << DMADESC_LENGTH_SHIFT) & DMADESC_LENGTH_MASK;
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len_stat = (skb->len << DMADESC_LENGTH_SHIFT) & DMADESC_LENGTH_MASK;
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@ -486,7 +523,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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}
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}
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priv->tx_desc_count--;
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priv->tx_desc_count--;
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@@ -642,8 +648,8 @@ static int bcm_enet_start_xmit(struct sk
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@@ -634,8 +640,8 @@ static int bcm_enet_start_xmit(struct sk
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wmb();
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wmb();
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/* kick tx dma */
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/* kick tx dma */
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@ -497,17 +534,17 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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/* stop queue if no more desc available */
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/* stop queue if no more desc available */
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if (!priv->tx_desc_count)
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if (!priv->tx_desc_count)
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@@ -771,6 +777,9 @@ static void bcm_enet_set_flow(struct bcm
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@@ -763,6 +769,9 @@ static void bcm_enet_set_flow(struct bcm
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val &= ~ENET_RXCFG_ENFLOW_MASK;
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val &= ~ENET_RXCFG_ENFLOW_MASK;
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enet_writel(priv, val, ENET_RXCFG_REG);
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enet_writel(priv, val, ENET_RXCFG_REG);
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+ if (priv->dma_no_sram)
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+ if (!priv->dma_has_sram)
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+ return;
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+ return;
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+
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+
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/* tx flow control (pause frame generation) */
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/* tx flow control (pause frame generation) */
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val = enet_dma_readl(priv, ENETDMA_CFG_REG);
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val = enet_dma_readl(priv, ENETDMA_CFG_REG);
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if (tx_en)
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if (tx_en)
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@@ -886,8 +895,8 @@ static int bcm_enet_open(struct net_devi
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@@ -910,8 +919,8 @@ static int bcm_enet_open(struct net_devi
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/* mask all interrupts and request them */
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/* mask all interrupts and request them */
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enet_writel(priv, 0, ENET_IRMASK_REG);
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enet_writel(priv, 0, ENET_IRMASK_REG);
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@ -518,13 +555,13 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
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ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
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if (ret)
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if (ret)
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@@ -964,8 +973,12 @@ static int bcm_enet_open(struct net_devi
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@@ -988,8 +997,12 @@ static int bcm_enet_open(struct net_devi
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priv->rx_curr_desc = 0;
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priv->rx_curr_desc = 0;
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/* initialize flow control buffer allocation */
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/* initialize flow control buffer allocation */
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- enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
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- enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
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- ENETDMA_BUFALLOC_REG(priv->rx_chan));
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- ENETDMA_BUFALLOC_REG(priv->rx_chan));
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+ if (!priv->dma_no_sram)
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+ if (priv->dma_has_sram)
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+ enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
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+ enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
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+ ENETDMA_BUFALLOC_REG(priv->rx_chan));
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+ ENETDMA_BUFALLOC_REG(priv->rx_chan));
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+ else
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+ else
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@ -533,7 +570,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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if (bcm_enet_refill_rx(dev)) {
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if (bcm_enet_refill_rx(dev)) {
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dev_err(kdev, "cannot allocate rx skb queue\n");
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dev_err(kdev, "cannot allocate rx skb queue\n");
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|
@@ -974,18 +987,30 @@ static int bcm_enet_open(struct net_devi
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@@ -998,18 +1011,30 @@ static int bcm_enet_open(struct net_devi
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}
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}
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/* write rx & tx ring addresses */
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/* write rx & tx ring addresses */
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@ -541,7 +578,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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- ENETDMAS_RSTART_REG(priv->rx_chan));
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- ENETDMAS_RSTART_REG(priv->rx_chan));
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- enet_dmas_writel(priv, priv->tx_desc_dma,
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- enet_dmas_writel(priv, priv->tx_desc_dma,
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- ENETDMAS_RSTART_REG(priv->tx_chan));
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- ENETDMAS_RSTART_REG(priv->tx_chan));
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+ if (!priv->dma_no_sram) {
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+ if (priv->dma_has_sram) {
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+ enet_dmas_writel(priv, priv->rx_desc_dma,
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+ enet_dmas_writel(priv, priv->rx_desc_dma,
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+ ENETDMAS_RSTART_REG, priv->rx_chan);
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+ ENETDMAS_RSTART_REG, priv->rx_chan);
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+ enet_dmas_writel(priv, priv->tx_desc_dma,
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+ enet_dmas_writel(priv, priv->tx_desc_dma,
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@ -560,7 +597,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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- enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->tx_chan));
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- enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->tx_chan));
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- enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->rx_chan));
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- enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->rx_chan));
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- enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->tx_chan));
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- enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->tx_chan));
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+ if (!priv->dma_no_sram) {
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+ if (priv->dma_has_sram) {
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+ enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->rx_chan);
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+ enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->rx_chan);
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+ enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->tx_chan);
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+ enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->tx_chan);
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+ enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->rx_chan);
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+ enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->rx_chan);
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@ -574,7 +611,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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/* set max rx/tx length */
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/* set max rx/tx length */
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enet_writel(priv, priv->hw_mtu, ENET_RXMAXLEN_REG);
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enet_writel(priv, priv->hw_mtu, ENET_RXMAXLEN_REG);
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@@ -993,18 +1018,24 @@ static int bcm_enet_open(struct net_devi
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@@ -1017,18 +1042,24 @@ static int bcm_enet_open(struct net_devi
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/* set dma maximum burst len */
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/* set dma maximum burst len */
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enet_dmac_writel(priv, priv->dma_maxburst,
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enet_dmac_writel(priv, priv->dma_maxburst,
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@ -592,7 +629,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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- enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));
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- enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));
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- val = (priv->rx_ring_size * 2) / 3;
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- val = (priv->rx_ring_size * 2) / 3;
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- enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));
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- enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));
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+ if (!priv->dma_no_sram) {
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+ if (priv->dma_has_sram) {
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+ val = priv->rx_ring_size / 3;
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+ val = priv->rx_ring_size / 3;
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+ enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));
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+ enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));
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+ val = (priv->rx_ring_size * 2) / 3;
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+ val = (priv->rx_ring_size * 2) / 3;
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@ -605,7 +642,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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/* all set, enable mac and interrupts, start dma engine and
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/* all set, enable mac and interrupts, start dma engine and
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* kick rx dma channel */
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* kick rx dma channel */
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@@ -1013,26 +1044,26 @@ static int bcm_enet_open(struct net_devi
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@@ -1037,26 +1068,26 @@ static int bcm_enet_open(struct net_devi
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val |= ENET_CTL_ENABLE_MASK;
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val |= ENET_CTL_ENABLE_MASK;
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enet_writel(priv, val, ENET_CTL_REG);
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enet_writel(priv, val, ENET_CTL_REG);
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enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
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enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
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@ -642,7 +679,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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if (priv->has_phy)
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if (priv->has_phy)
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phy_start(priv->phydev);
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phy_start(priv->phydev);
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@@ -1109,13 +1140,13 @@ static void bcm_enet_disable_dma(struct
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@@ -1136,13 +1167,13 @@ static void bcm_enet_disable_dma(struct
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{
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{
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int limit;
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int limit;
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@ -658,7 +695,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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if (!(val & ENETDMAC_CHANCFG_EN_MASK))
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if (!(val & ENETDMAC_CHANCFG_EN_MASK))
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break;
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break;
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udelay(1);
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udelay(1);
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@@ -1142,8 +1173,8 @@ static int bcm_enet_stop(struct net_devi
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@@ -1169,8 +1200,8 @@ static int bcm_enet_stop(struct net_devi
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/* mask all interrupts */
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/* mask all interrupts */
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enet_writel(priv, 0, ENET_IRMASK_REG);
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enet_writel(priv, 0, ENET_IRMASK_REG);
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@ -669,19 +706,19 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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/* make sure no mib update is scheduled */
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/* make sure no mib update is scheduled */
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cancel_work_sync(&priv->mib_update_task);
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cancel_work_sync(&priv->mib_update_task);
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@@ -1751,6 +1782,11 @@ static int bcm_enet_probe(struct platfor
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@@ -1784,6 +1815,11 @@ static int bcm_enet_probe(struct platfor
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priv->pause_tx = pd->pause_tx;
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priv->pause_tx = pd->pause_tx;
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priv->force_duplex_full = pd->force_duplex_full;
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priv->force_duplex_full = pd->force_duplex_full;
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priv->force_speed_100 = pd->force_speed_100;
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priv->force_speed_100 = pd->force_speed_100;
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+ priv->dma_chan_en_mask = pd->dma_chan_en_mask;
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+ priv->dma_chan_en_mask = pd->dma_chan_en_mask;
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+ priv->dma_chan_int_mask = pd->dma_chan_int_mask;
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+ priv->dma_chan_int_mask = pd->dma_chan_int_mask;
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+ priv->dma_chan_width = pd->dma_chan_width;
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+ priv->dma_chan_width = pd->dma_chan_width;
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+ priv->dma_no_sram = pd->dma_no_sram;
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+ priv->dma_has_sram = pd->dma_has_sram;
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+ priv->dma_desc_shift = pd->dma_desc_shift;
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+ priv->dma_desc_shift = pd->dma_desc_shift;
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}
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}
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if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) {
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if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) {
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@@ -2122,8 +2158,8 @@ static int bcm_enetsw_open(struct net_de
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@@ -2121,8 +2157,8 @@ static int bcm_enetsw_open(struct net_de
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kdev = &priv->pdev->dev;
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kdev = &priv->pdev->dev;
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/* mask all interrupts and request them */
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/* mask all interrupts and request them */
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@ -692,7 +729,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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ret = request_irq(priv->irq_rx, bcm_enet_isr_dma,
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ret = request_irq(priv->irq_rx, bcm_enet_isr_dma,
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IRQF_DISABLED, dev->name, dev);
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IRQF_DISABLED, dev->name, dev);
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@@ -2247,23 +2283,23 @@ static int bcm_enetsw_open(struct net_de
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@@ -2234,23 +2270,23 @@ static int bcm_enetsw_open(struct net_de
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/* write rx & tx ring addresses */
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/* write rx & tx ring addresses */
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enet_dmas_writel(priv, priv->rx_desc_dma,
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enet_dmas_writel(priv, priv->rx_desc_dma,
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@ -726,7 +763,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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/* set flow control low/high threshold to 1/3 / 2/3 */
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/* set flow control low/high threshold to 1/3 / 2/3 */
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val = priv->rx_ring_size / 3;
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val = priv->rx_ring_size / 3;
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@@ -2276,21 +2312,21 @@ static int bcm_enetsw_open(struct net_de
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@@ -2264,21 +2300,21 @@ static int bcm_enetsw_open(struct net_de
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wmb();
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wmb();
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enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
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enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
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enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
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enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
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@ -753,7 +790,7 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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netif_carrier_on(dev);
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netif_carrier_on(dev);
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netif_start_queue(dev);
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netif_start_queue(dev);
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@@ -2396,8 +2432,8 @@ static int bcm_enetsw_stop(struct net_de
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@@ -2380,8 +2416,8 @@ static int bcm_enetsw_stop(struct net_de
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del_timer_sync(&priv->rx_timeout);
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del_timer_sync(&priv->rx_timeout);
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/* mask all interrupts */
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/* mask all interrupts */
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@ -764,10 +801,11 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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/* disable dma & mac */
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/* disable dma & mac */
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bcm_enet_disable_dma(priv, priv->tx_chan);
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bcm_enet_disable_dma(priv, priv->tx_chan);
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@@ -2735,6 +2771,9 @@ static int bcm_enetsw_probe(struct platf
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@@ -2715,6 +2751,10 @@ static int bcm_enetsw_probe(struct platf
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memcpy(priv->used_ports, pd->used_ports,
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memcpy(priv->used_ports, pd->used_ports,
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sizeof (pd->used_ports));
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sizeof(pd->used_ports));
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priv->num_ports = pd->num_ports;
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priv->num_ports = pd->num_ports;
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+ priv->dma_has_sram = pd->dma_has_sram;
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+ priv->dma_chan_en_mask = pd->dma_chan_en_mask;
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+ priv->dma_chan_en_mask = pd->dma_chan_en_mask;
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+ priv->dma_chan_int_mask = pd->dma_chan_int_mask;
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+ priv->dma_chan_int_mask = pd->dma_chan_int_mask;
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+ priv->dma_chan_width = pd->dma_chan_width;
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+ priv->dma_chan_width = pd->dma_chan_width;
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@ -787,8 +825,8 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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+ /* dma channel interrupt mask */
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+ /* dma channel interrupt mask */
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+ u32 dma_chan_int_mask;
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+ u32 dma_chan_int_mask;
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+
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+
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+ /* dma engine has *no* internal SRAM */
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+ /* DMA engine has internal SRAM */
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+ unsigned int dma_no_sram;
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+ bool dma_has_sram;
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+
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+
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+ /* dma channel width */
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+ /* dma channel width */
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+ unsigned int dma_chan_width;
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+ unsigned int dma_chan_width;
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@ -797,4 +835,4 @@ Subject: [PATCH 69/72] 443-MIPS-BCM63XX-enable-enet-for-BCM6345.patch |
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+ unsigned int dma_desc_shift;
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+ unsigned int dma_desc_shift;
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};
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};
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static inline int bcm_enet_port_is_rgmii(int portid)
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