Update patches with their upstream versions. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 37098master
Jonas Gorski
11 years ago
parent
12c033dfd9
commit
66f8f30f47
@ -1,7 +1,7 @@ |
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From 8e0bd819cc0f8815cad99feea98664172c0b1fe4 Mon Sep 17 00:00:00 2001
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From 1a66581c94ad3966a823f2efaf8a5cc514895318 Mon Sep 17 00:00:00 2001
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From: Kevin Cernekee <cernekee@gmail.com>
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Date: Mon, 31 Oct 2011 11:52:10 -0700
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Subject: [PATCH 02/13] MIPS: BCM63XX: Handle SW IRQs 0-1
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Subject: [PATCH 2/3] MIPS: BCM63XX: Handle SW IRQs 0-1
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MIPS software IRQs 0 and 1 are used for interprocessor signaling (IPI)
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on BMIPS SMP. Make the board support code aware of them.
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@ -0,0 +1,27 @@ |
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From 158a11f25e070a6ed99cf8faa985da1f2669230f Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jogo@openwrt.org>
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Date: Sun, 21 Apr 2013 14:44:00 +0200
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Subject: [PATCH 3/3] MIPS: BCM63XX: select BMIPS4350 and default to 2 CPUs
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for supported SoCs
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All BCM63XX SoCs starting with BCM6358 have a BMIPS4350 instead of a
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BMIPS3300, so select it unless support for any of the older SoCs is
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selected.
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All BMIPS4350 have only two CPUs, so select the appropriate default.
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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arch/mips/Kconfig | 2 ++
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1 file changed, 2 insertions(+)
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -129,6 +129,8 @@ config BCM63XX
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select DMA_NONCOHERENT
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select IRQ_CPU
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select SYS_HAS_CPU_MIPS32_R1
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+ select SYS_HAS_CPU_BMIPS4350 if !BCM63XX_CPU_6338 && !BCM63XX_CPU_6345 && !BCM63XX_CPU_6348
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+ select NR_CPUS_DEFAULT_2
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select SYS_SUPPORTS_32BIT_KERNEL
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select SYS_SUPPORTS_BIG_ENDIAN
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select SYS_HAS_EARLY_PRINTK
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@ -0,0 +1,30 @@ |
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From 373eb1a286bf31b41f966d5d3826cfe63e826c92 Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <florian@openwrt.org>
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Date: Tue, 18 Jun 2013 16:55:39 +0000
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Subject: [PATCH 1/6] MIPS: BCM63XX: select BOOT_RAW
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Enabling BOOT_RAW is mandatory to get a binary image (objcopy from ELF
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to binary) to work. This does not affect the ELF kernels which are used
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by CFE on BCM63XX DSL platforms, but is going to be necessary to support
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BCM63XX on Cable Modem chips such as BCM3368.
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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Cc: linux-mips@linux-mips.org
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Cc: cernekee@gmail.com
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Cc: jogo@openwrt.org
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Patchwork: https://patchwork.linux-mips.org/patch/5500/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/Kconfig | 1 +
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1 file changed, 1 insertion(+)
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -124,6 +124,7 @@ config BCM47XX
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config BCM63XX
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bool "Broadcom BCM63XX based boards"
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+ select BOOT_RAW
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select CEVT_R4K
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select CSRC_R4K
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select DMA_NONCOHERENT
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@ -0,0 +1,101 @@ |
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From f3b3faafe7b5a1c07b12d18e96c36bc8a0eecaed Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <florian@openwrt.org>
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Date: Tue, 18 Jun 2013 16:55:41 +0000
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Subject: [PATCH 3/6] MIPS: BCM63XX: recognize Cable Modem firmware format
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Add the firmware header format which is used by Broadcom Cable Modem
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SoCs such as the BCM3368 SoC. We export the bcm_hcs firmware format
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structure because it is used by user-land tools to create firmware
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images for these SoCs and will later be used by a corresponding MTD
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parser.
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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Cc: linux-mips@linux-mips.org
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Cc: cernekee@gmail.com
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Cc: jogo@openwrt.org
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Patchwork: https://patchwork.linux-mips.org/patch/5496/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/bcm63xx/boards/board_bcm963xx.c | 14 ++++++++++++--
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include/uapi/linux/Kbuild | 1 +
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include/uapi/linux/bcm933xx_hcs.h | 24 ++++++++++++++++++++++++
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3 files changed, 37 insertions(+), 2 deletions(-)
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create mode 100644 include/uapi/linux/bcm933xx_hcs.h
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--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
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+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
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@@ -28,8 +28,12 @@
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#include <bcm63xx_dev_usb_usbd.h>
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#include <board_bcm963xx.h>
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+#include <uapi/linux/bcm933xx_hcs.h>
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+
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#define PFX "board_bcm963xx: "
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+#define HCS_OFFSET_128K 0x20000
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+
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static struct board_info board;
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/*
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@@ -722,8 +726,9 @@ void __init board_prom_init(void)
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unsigned int i;
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u8 *boot_addr, *cfe;
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char cfe_version[32];
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- char *board_name;
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+ char *board_name = NULL;
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u32 val;
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+ struct bcm_hcs *hcs;
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/* read base address of boot chip select (0)
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* 6328/6362 do not have MPI but boot from a fixed address
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@@ -747,7 +752,12 @@ void __init board_prom_init(void)
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bcm63xx_nvram_init(boot_addr + BCM963XX_NVRAM_OFFSET);
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- board_name = bcm63xx_nvram_get_name();
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+ if (BCMCPU_IS_3368()) {
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+ hcs = (struct bcm_hcs *)boot_addr;
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+ board_name = hcs->filename;
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+ } else {
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+ board_name = bcm63xx_nvram_get_name();
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+ }
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/* find board by name */
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for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
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if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
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--- a/include/uapi/linux/Kbuild
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+++ b/include/uapi/linux/Kbuild
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@@ -62,6 +62,7 @@ header-y += auxvec.h
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header-y += ax25.h
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header-y += b1lli.h
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header-y += baycom.h
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+header-y += bcm933xx_hcs.h
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header-y += bfs_fs.h
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header-y += binfmts.h
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header-y += blkpg.h
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--- /dev/null
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+++ b/include/uapi/linux/bcm933xx_hcs.h
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@@ -0,0 +1,24 @@
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+/*
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+ * Broadcom Cable Modem firmware format
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+ */
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+
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+#ifndef __BCM933XX_HCS_H
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+#define __BCM933XX_HCS_H
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+
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+#include <linux/types.h>
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+
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+struct bcm_hcs {
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+ __u16 magic;
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+ __u16 control;
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+ __u16 rev_maj;
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+ __u16 rev_min;
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+ __u32 build_date;
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+ __u32 filelen;
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+ __u32 ldaddress;
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+ char filename[64];
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+ __u16 hcs;
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+ __u16 her_znaet_chto;
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+ __u32 crc;
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+};
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+
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+#endif /* __BCM933XX_HCS */
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@ -1,3 +1,23 @@ |
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From 404fdc457082772ff52e22988e09e82c0d6e8780 Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <florian@openwrt.org>
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Date: Tue, 18 Jun 2013 16:55:42 +0000
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Subject: [PATCH 4/6] MIPS: BCM63XX: provide a MAC address for BCM3368 chips
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The BCM3368 SoC uses a NVRAM format which is not compatible with the one
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used by CFE, provide a default MAC address which is suitable for use and
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which is the default one also being used by the bootloader on these
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chips.
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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Cc: linux-mips@linux-mips.org
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Cc: cernekee@gmail.com
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Cc: jogo@openwrt.org
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Patchwork: https://patchwork.linux-mips.org/patch/5498/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/bcm63xx/nvram.c | 10 ++++++++++
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1 file changed, 10 insertions(+)
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--- a/arch/mips/bcm63xx/nvram.c
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+++ b/arch/mips/bcm63xx/nvram.c
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@@ -45,6 +45,7 @@ void __init bcm63xx_nvram_init(void *add
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@ -0,0 +1,49 @@ |
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From 0a97aafe7fe50ed183e7fa0121fa7838e2e20306 Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <florian@openwrt.org>
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Date: Tue, 18 Jun 2013 16:55:43 +0000
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Subject: [PATCH 5/6] MIPS: BCM63XX: let board specify an external GPIO to
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reset PHY
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Some boards may need to reset their external PHY or switch they are
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attached to, add a hook for doing this along with providing custom
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linux/gpio.h flags for doing this.
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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Cc: linux-mips@linux-mips.org
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Cc: cernekee@gmail.com
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Cc: jogo@openwrt.org
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Cc: Florian Fainelli <florian@openwrt.org>
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Patchwork: https://patchwork.linux-mips.org/patch/5501/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++
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arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 6 ++++++
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2 files changed, 10 insertions(+)
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--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
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+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
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@@ -883,5 +883,9 @@ int __init board_register_devices(void)
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platform_device_register(&bcm63xx_gpio_leds);
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+ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
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+ gpio_request_one(board.ephy_reset_gpio,
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+ board.ephy_reset_gpio_flags, "ephy-reset");
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+
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return 0;
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}
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--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
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@@ -45,6 +45,12 @@ struct board_info {
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/* GPIO LEDs */
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struct gpio_led leds[5];
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+
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+ /* External PHY reset GPIO */
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+ unsigned int ephy_reset_gpio;
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+
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+ /* External PHY reset GPIO flags from gpio.h */
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+ unsigned long ephy_reset_gpio_flags;
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};
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#endif /* ! BOARD_BCM963XX_H_ */
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@ -0,0 +1,70 @@ |
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From 04760855f0d99a1cdc67ae0152d95bcc4525cff5 Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <florian@openwrt.org>
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Date: Tue, 18 Jun 2013 16:55:44 +0000
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Subject: [PATCH 6/6] MIPS: BCM63XX: add support for the Netgear CVG834G
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Add support for the Netgear CVG834G and enable the two UARTs, Ethernet
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on the first MAC, PCI and the two leds.
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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Cc: linux-mips@linux-mips.org
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Cc: cernekee@gmail.com
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Cc: jogo@openwrt.org
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Cc: Florian Fainelli <florian@openwrt.org>
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Patchwork: https://patchwork.linux-mips.org/patch/5502/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/bcm63xx/boards/board_bcm963xx.c | 35 +++++++++++++++++++++++++++++
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1 file changed, 35 insertions(+)
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--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
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+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
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@@ -37,6 +37,38 @@
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static struct board_info board;
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/*
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+ * known 3368 boards
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+ */
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+#ifdef CONFIG_BCM63XX_CPU_3368
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+static struct board_info __initdata board_cvg834g = {
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+ .name = "CVG834G_E15R3921",
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+ .expected_cpu_id = 0x3368,
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+
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+ .has_uart0 = 1,
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+ .has_uart1 = 1,
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+
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+ .has_enet0 = 1,
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+ .has_pci = 1,
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+
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+ .enet0 = {
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+ .has_phy = 1,
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+ .use_internal_phy = 1,
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+ },
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+
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+ .leds = {
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+ {
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+ .name = "CVG834G:green:power",
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+ .gpio = 37,
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+ .default_trigger= "default-on",
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+ },
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+ },
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+
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+ .ephy_reset_gpio = 36,
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+ .ephy_reset_gpio_flags = GPIOF_INIT_HIGH,
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+};
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+#endif
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+
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+/*
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* known 6328 boards
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*/
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#ifdef CONFIG_BCM63XX_CPU_6328
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@@ -643,6 +675,9 @@ static struct board_info __initdata boar
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* all boards
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*/
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static const struct board_info __initconst *bcm963xx_boards[] = {
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+#ifdef CONFIG_BCM63XX_CPU_3368
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+ &board_cvg834g,
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+#endif
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#ifdef CONFIG_BCM63XX_CPU_6328
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&board_96328avng,
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#endif
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@ -0,0 +1,47 @@ |
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From 318883517ebc56e1f9068597e9875f578016e225 Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <florian@openwrt.org>
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Date: Tue, 18 Jun 2013 16:55:38 +0000
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Subject: [PATCH] MIPS: BCM63XX: remove bogus Kconfig selects
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Remove the bogus selects on USB-related symbols for 6345 and 6338, not
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only we do not yet support USB on BCM63XX, but they also cause the
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following warnings:
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warning: (BCM63XX_CPU_6338 && BCM63XX_CPU_6345) selects
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USB_OHCI_BIG_ENDIAN_MMIO which has unmet direct dependencies
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(USB_SUPPORT && USB && USB_OHCI_HCD)
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warning: (BCM63XX_CPU_6338 && BCM63XX_CPU_6345) selects
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USB_OHCI_BIG_ENDIAN_DESC which has unmet direct dependencies
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(USB_SUPPORT && USB && USB_OHCI_HCD)
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make[4]: Leaving directory `/home/florian/dev/linux'
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Just get rid of these bogus Kconfig selects because neither 6345 nor
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6338 actually have built-in USB host controllers.
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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Cc: linux-mips@linux-mips.org
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Cc: cernekee@gmail.com
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Cc: jogo@openwrt.org
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Patchwork: http://patchwork.linux-mips.org/patch/5497/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/bcm63xx/Kconfig | 5 -----
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1 file changed, 5 deletions(-)
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--- a/arch/mips/bcm63xx/Kconfig
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+++ b/arch/mips/bcm63xx/Kconfig
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@@ -12,14 +12,9 @@ config BCM63XX_CPU_6328
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config BCM63XX_CPU_6338
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bool "support 6338 CPU"
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select HW_HAS_PCI
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- select USB_ARCH_HAS_OHCI
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- select USB_OHCI_BIG_ENDIAN_DESC
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- select USB_OHCI_BIG_ENDIAN_MMIO
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config BCM63XX_CPU_6345
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bool "support 6345 CPU"
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- select USB_OHCI_BIG_ENDIAN_DESC
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- select USB_OHCI_BIG_ENDIAN_MMIO
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config BCM63XX_CPU_6348
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bool "support 6348 CPU"
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@ -0,0 +1,89 @@ |
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From 672d6bea85c7c9c63c086a9423e6d4e5fc286152 Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <florian@openwrt.org>
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Date: Wed, 26 Jun 2013 18:11:56 +0000
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Subject: [PATCH] MIPS: BMIPS: support booting from physical CPU other than 0
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BMIPS43xx CPUs have two hardware threads, and on some SoCs such as 3368,
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the bootloader has configured the system to boot from TP1 instead of the
|
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more usual TP0. Create the physical to logical CPU mapping to cope with
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that, do not remap the software interrupts to be cross CPUs such that we
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do not have to do use the logical CPU mapping further down the code, and
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finally, reset the slave TP1 only if booted from TP0.
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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Cc: linux-mips@linux-mips.org
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Cc: blogic@openwrt.org
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Cc: cernekee@gmail.com
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Patchwork: https://patchwork.linux-mips.org/patch/5553/
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Patchwork: https://patchwork.linux-mips.org/patch/5556/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/kernel/smp-bmips.c | 29 +++++++++++++++++++++++------
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1 file changed, 23 insertions(+), 6 deletions(-)
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--- a/arch/mips/kernel/smp-bmips.c
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+++ b/arch/mips/kernel/smp-bmips.c
|
||||
@@ -63,7 +63,7 @@ static irqreturn_t bmips_ipi_interrupt(i
|
||||
|
||||
static void __init bmips_smp_setup(void)
|
||||
{
|
||||
- int i;
|
||||
+ int i, cpu = 1, boot_cpu = 0;
|
||||
|
||||
#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
|
||||
/* arbitration priority */
|
||||
@@ -72,13 +72,22 @@ static void __init bmips_smp_setup(void)
|
||||
/* NBK and weak order flags */
|
||||
set_c0_brcm_config_0(0x30000);
|
||||
|
||||
+ /* Find out if we are running on TP0 or TP1 */
|
||||
+ boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
|
||||
+
|
||||
/*
|
||||
* MIPS interrupts 0,1 (SW INT 0,1) cross over to the other thread
|
||||
* MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output
|
||||
* MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output
|
||||
+ *
|
||||
+ * If booting from TP1, leave the existing CMT interrupt routing
|
||||
+ * such that TP0 responds to SW1 and TP1 responds to SW0.
|
||||
*/
|
||||
- change_c0_brcm_cmt_intr(0xf8018000,
|
||||
- (0x02 << 27) | (0x03 << 15));
|
||||
+ if (boot_cpu == 0)
|
||||
+ change_c0_brcm_cmt_intr(0xf8018000,
|
||||
+ (0x02 << 27) | (0x03 << 15));
|
||||
+ else
|
||||
+ change_c0_brcm_cmt_intr(0xf8018000, (0x1d << 27));
|
||||
|
||||
/* single core, 2 threads (2 pipelines) */
|
||||
max_cpus = 2;
|
||||
@@ -106,9 +115,15 @@ static void __init bmips_smp_setup(void)
|
||||
if (!board_ebase_setup)
|
||||
board_ebase_setup = &bmips_ebase_setup;
|
||||
|
||||
+ __cpu_number_map[boot_cpu] = 0;
|
||||
+ __cpu_logical_map[0] = boot_cpu;
|
||||
+
|
||||
for (i = 0; i < max_cpus; i++) {
|
||||
- __cpu_number_map[i] = 1;
|
||||
- __cpu_logical_map[i] = 1;
|
||||
+ if (i != boot_cpu) {
|
||||
+ __cpu_number_map[i] = cpu;
|
||||
+ __cpu_logical_map[cpu] = i;
|
||||
+ cpu++;
|
||||
+ }
|
||||
set_cpu_possible(i, 1);
|
||||
set_cpu_present(i, 1);
|
||||
}
|
||||
@@ -157,7 +172,9 @@ static void bmips_boot_secondary(int cpu
|
||||
bmips_send_ipi_single(cpu, 0);
|
||||
else {
|
||||
#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
|
||||
- set_c0_brcm_cmt_ctrl(0x01);
|
||||
+ /* Reset slave TP1 if booting from TP0 */
|
||||
+ if (cpu_logical_map(cpu) == 0)
|
||||
+ set_c0_brcm_cmt_ctrl(0x01);
|
||||
#elif defined(CONFIG_CPU_BMIPS5000)
|
||||
if (cpu & 0x01)
|
||||
write_c0_brcm_action(ACTION_BOOT_THREAD(cpu));
|
||||
@ -0,0 +1,82 @@ |
||||
From 7c44eabf20cba12049bf9eebfa192afcc2053b2d Mon Sep 17 00:00:00 2001
|
||||
From: Kevin Cernekee <cernekee@gmail.com>
|
||||
Date: Sat, 9 Jul 2011 12:15:06 -0700
|
||||
Subject: [PATCH V2 1/2] MIPS: BCM63XX: Add SMP support to prom.c
|
||||
|
||||
This involves two changes to the BSP code:
|
||||
|
||||
1) register_smp_ops() for BMIPS SMP
|
||||
|
||||
2) The CPU1 boot vector on some of the BCM63xx platforms conflicts with
|
||||
the special interrupt vector (IV). Move it to 0x8000_0380 at boot time,
|
||||
to resolve the conflict.
|
||||
|
||||
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
|
||||
[jogo@openwrt.org: moved SMP ops registration into ifdef guard,
|
||||
changed ifdef guards to if (IS_ENABLED())]
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
V1 -> V2:
|
||||
* changed ifdef guards to if (IS_ENABLED())
|
||||
|
||||
arch/mips/bcm63xx/prom.c | 41 +++++++++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 41 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm63xx/prom.c
|
||||
+++ b/arch/mips/bcm63xx/prom.c
|
||||
@@ -8,7 +8,11 @@
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/bootmem.h>
|
||||
+#include <linux/smp.h>
|
||||
#include <asm/bootinfo.h>
|
||||
+#include <asm/bmips.h>
|
||||
+#include <asm/smp-ops.h>
|
||||
+#include <asm/mipsregs.h>
|
||||
#include <bcm63xx_board.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_io.h>
|
||||
@@ -54,6 +58,43 @@ void __init prom_init(void)
|
||||
|
||||
/* do low level board init */
|
||||
board_prom_init();
|
||||
+
|
||||
+ if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) {
|
||||
+ /* set up SMP */
|
||||
+ register_smp_ops(&bmips_smp_ops);
|
||||
+
|
||||
+ /*
|
||||
+ * BCM6328 might not have its second CPU enabled, while BCM6358
|
||||
+ * needs special handling for its shared TLB, so disable SMP
|
||||
+ * for now.
|
||||
+ */
|
||||
+ if (BCMCPU_IS_6328()) {
|
||||
+ bmips_smp_enabled = 0;
|
||||
+ } else if (BCMCPU_IS_6358()) {
|
||||
+ bmips_smp_enabled = 0;
|
||||
+ }
|
||||
+
|
||||
+ if (!bmips_smp_enabled)
|
||||
+ return;
|
||||
+
|
||||
+ /*
|
||||
+ * The bootloader has set up the CPU1 reset vector at
|
||||
+ * 0xa000_0200.
|
||||
+ * This conflicts with the special interrupt vector (IV).
|
||||
+ * The bootloader has also set up CPU1 to respond to the wrong
|
||||
+ * IPI interrupt.
|
||||
+ * Here we will start up CPU1 in the background and ask it to
|
||||
+ * reconfigure itself then go back to sleep.
|
||||
+ */
|
||||
+ memcpy((void *)0xa0000200, &bmips_smp_movevec, 0x20);
|
||||
+ __sync();
|
||||
+ set_c0_cause(C_SW0);
|
||||
+ cpumask_set_cpu(1, &bmips_booted_mask);
|
||||
+
|
||||
+ /*
|
||||
+ * FIXME: we really should have some sort of hazard barrier here
|
||||
+ */
|
||||
+ }
|
||||
}
|
||||
|
||||
void __init prom_free_prom_memory(void)
|
||||
@ -0,0 +1,55 @@ |
||||
From 41fa6dec9df9b4e55ac522c899270a72e51a9b4b Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sat, 9 Jul 2011 12:15:06 -0700
|
||||
Subject: [PATCH V2 2/2] MIPS: BCM63XX: Enable second core SMP on BCM6328 if
|
||||
available
|
||||
|
||||
BCM6328 has a OTP which tells us if the second core is available.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/prom.c | 6 +++++-
|
||||
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 ++
|
||||
arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 7 +++++++
|
||||
3 files changed, 14 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/prom.c
|
||||
+++ b/arch/mips/bcm63xx/prom.c
|
||||
@@ -69,7 +69,11 @@ void __init prom_init(void)
|
||||
* for now.
|
||||
*/
|
||||
if (BCMCPU_IS_6328()) {
|
||||
- bmips_smp_enabled = 0;
|
||||
+ reg = bcm_readl(BCM_6328_OTP_BASE +
|
||||
+ OTP_USER_BITS_6328_REG(3));
|
||||
+
|
||||
+ if (reg & OTP_6328_REG3_TP1_DISABLED)
|
||||
+ bmips_smp_enabled = 0;
|
||||
} else if (BCMCPU_IS_6358()) {
|
||||
bmips_smp_enabled = 0;
|
||||
}
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||
@@ -296,6 +296,8 @@ enum bcm63xx_regs_set {
|
||||
#define BCM_6328_PCMDMAS_BASE (0xdeadbeef)
|
||||
#define BCM_6328_RNG_BASE (0xdeadbeef)
|
||||
#define BCM_6328_MISC_BASE (0xb0001800)
|
||||
+#define BCM_6328_OTP_BASE (0xb0000600)
|
||||
+
|
||||
/*
|
||||
* 6338 register sets base address
|
||||
*/
|
||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
||||
@@ -1477,4 +1477,11 @@
|
||||
|
||||
#define PCIE_DEVICE_OFFSET 0x8000
|
||||
|
||||
+/*************************************************************************
|
||||
+ * _REG relative to RSET_OTP
|
||||
+ *************************************************************************/
|
||||
+
|
||||
+#define OTP_USER_BITS_6328_REG(i) (0x20 + (i) * 4)
|
||||
+#define OTP_6328_REG3_TP1_DISABLED BIT(9)
|
||||
+
|
||||
#endif /* BCM63XX_REGS_H_ */
|
||||
@ -1,22 +0,0 @@ |
||||
From c110865541e2d3782c412af9d48c016de5a64d9c Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jonas.gorski@gmail.com>
|
||||
Date: Tue, 14 Jun 2011 21:14:39 +0200
|
||||
Subject: [PATCH 42/79] MIPS: BCM63XX: allow second UART on BCM6328
|
||||
|
||||
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
|
||||
---
|
||||
arch/mips/bcm63xx/dev-uart.c | 3 ++-
|
||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/dev-uart.c
|
||||
+++ b/arch/mips/bcm63xx/dev-uart.c
|
||||
@@ -54,7 +54,8 @@ int __init bcm63xx_uart_register(unsigne
|
||||
if (id >= ARRAY_SIZE(bcm63xx_uart_devices))
|
||||
return -ENODEV;
|
||||
|
||||
- if (id == 1 && (!BCMCPU_IS_6358() && !BCMCPU_IS_6368()))
|
||||
+ if (id == 1 && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
|
||||
+ !BCMCPU_IS_6368())
|
||||
return -ENODEV;
|
||||
|
||||
if (id == 0) {
|
||||
@ -1,71 +0,0 @@ |
||||
From 10ea7fd6b854c3ecf745d053beba10c7e00c33c9 Mon Sep 17 00:00:00 2001
|
||||
From: Kevin Cernekee <cernekee@gmail.com>
|
||||
Date: Sat, 9 Jul 2011 12:15:06 -0700
|
||||
Subject: [PATCH 01/13] MIPS: BCM63XX: Add SMP support to prom.c
|
||||
|
||||
This involves two changes to the BSP code:
|
||||
|
||||
1) register_smp_ops() for BMIPS SMP
|
||||
|
||||
2) The CPU1 boot vector on some of the BCM63xx platforms conflicts with
|
||||
the special interrupt vector (IV). Move it to 0x8000_0380 at boot time,
|
||||
to resolve the conflict.
|
||||
|
||||
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
|
||||
[jogo@openwrt: move smp ops registration below #ifdef guard, don't enable
|
||||
smp for 6328/6358]
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/prom.c | 33 +++++++++++++++++++++++++++++++++
|
||||
1 file changed, 33 insertions(+)
|
||||
|
||||
--- a/arch/mips/bcm63xx/prom.c
|
||||
+++ b/arch/mips/bcm63xx/prom.c
|
||||
@@ -8,7 +8,11 @@
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/bootmem.h>
|
||||
+#include <linux/smp.h>
|
||||
#include <asm/bootinfo.h>
|
||||
+#include <asm/bmips.h>
|
||||
+#include <asm/smp-ops.h>
|
||||
+#include <asm/mipsregs.h>
|
||||
#include <bcm63xx_board.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_io.h>
|
||||
@@ -52,6 +56,35 @@ void __init prom_init(void)
|
||||
|
||||
/* do low level board init */
|
||||
board_prom_init();
|
||||
+
|
||||
+#if defined(CONFIG_CPU_BMIPS4350) && defined(CONFIG_SMP)
|
||||
+ /* set up SMP */
|
||||
+ register_smp_ops(&bmips_smp_ops);
|
||||
+
|
||||
+ /*
|
||||
+ * BCM6328 does not have its second CPU enabled, while BCM6358
|
||||
+ * needs special handling for its shared TLB, so disable SMP for now.
|
||||
+ */
|
||||
+ if (BCMCPU_IS_6328() || BCMCPU_IS_6358()) {
|
||||
+ bmips_smp_enabled = 0;
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ /*
|
||||
+ * The bootloader has set up the CPU1 reset vector at 0xa000_0200.
|
||||
+ * This conflicts with the special interrupt vector (IV).
|
||||
+ * The bootloader has also set up CPU1 to respond to the wrong
|
||||
+ * IPI interrupt.
|
||||
+ * Here we will start up CPU1 in the background and ask it to
|
||||
+ * reconfigure itself then go back to sleep.
|
||||
+ */
|
||||
+ memcpy((void *)0xa0000200, &bmips_smp_movevec, 0x20);
|
||||
+ __sync();
|
||||
+ set_c0_cause(C_SW0);
|
||||
+ cpumask_set_cpu(1, &bmips_booted_mask);
|
||||
+
|
||||
+ /* FIXME: we really should have some sort of hazard barrier here */
|
||||
+#endif
|
||||
}
|
||||
|
||||
void __init prom_free_prom_memory(void)
|
||||
@ -1,24 +0,0 @@ |
||||
From 1923ce1435a5e89f9550e8c95db37a3ef1f92665 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Sun, 21 Apr 2013 14:44:00 +0200
|
||||
Subject: [PATCH 03/13] MIPS: BCM63XX: select SYS_HAS_CPU_BMIPS4350 for
|
||||
supported SoCs
|
||||
|
||||
BCM6338, BCM6345 and BCM6348 have a BMIPS3300, everything following
|
||||
has a BMIPS4350.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/Kconfig | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
--- a/arch/mips/Kconfig
|
||||
+++ b/arch/mips/Kconfig
|
||||
@@ -129,6 +129,7 @@ config BCM63XX
|
||||
select DMA_NONCOHERENT
|
||||
select IRQ_CPU
|
||||
select SYS_HAS_CPU_MIPS32_R1
|
||||
+ select SYS_HAS_CPU_BMIPS4350 if !BCM63XX_CPU_6338 && !BCM63XX_CPU_6345 && !BCM63XX_CPU_6348
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_BIG_ENDIAN
|
||||
select SYS_HAS_EARLY_PRINTK
|
||||
@ -1,68 +0,0 @@ |
||||
From 8679976d2ec08db4e4a14ecdd1ee022b70e51fc6 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Tue, 30 Apr 2013 11:26:53 +0200
|
||||
Subject: [PATCH 12/13] MIPS: BCM63XX: add cpumask argument to unmask
|
||||
|
||||
Allow selective unmasking of IPIC irqs.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/irq.c | 19 +++++++++++++------
|
||||
1 file changed, 13 insertions(+), 6 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/irq.c
|
||||
+++ b/arch/mips/bcm63xx/irq.c
|
||||
@@ -24,8 +24,10 @@ static void __dispatch_internal_32(int c
|
||||
static void __dispatch_internal_64(int cpu) __maybe_unused;
|
||||
static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
|
||||
static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
|
||||
-static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
|
||||
-static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
|
||||
+static void __internal_irq_unmask_32(unsigned int irq,
|
||||
+ const struct cpumask *dest) __maybe_unused;
|
||||
+static void __internal_irq_unmask_64(unsigned int irq,
|
||||
+ const struct cpumask *dest) __maybe_unused;
|
||||
|
||||
static DEFINE_SPINLOCK(ipic_lock);
|
||||
static DEFINE_SPINLOCK(epic_lock);
|
||||
@@ -150,7 +152,8 @@ static unsigned int ext_irq_count;
|
||||
static unsigned int ext_irq_start, ext_irq_end;
|
||||
static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
|
||||
static void (*internal_irq_mask)(unsigned int irq);
|
||||
-static void (*internal_irq_unmask)(unsigned int irq);
|
||||
+static void (*internal_irq_unmask)(unsigned int irq,
|
||||
+ const struct cpumask *dest);
|
||||
|
||||
static void bcm63xx_init_irq(void)
|
||||
{
|
||||
@@ -340,7 +343,8 @@ static void __internal_irq_mask_##width(
|
||||
} \
|
||||
} \
|
||||
\
|
||||
-static void __internal_irq_unmask_##width(unsigned int irq) \
|
||||
+static void __internal_irq_unmask_##width(unsigned int irq, \
|
||||
+ const struct cpumask *dest) \
|
||||
{ \
|
||||
u32 val; \
|
||||
unsigned reg = (irq / 32) ^ (width/32 - 1); \
|
||||
@@ -351,7 +355,10 @@ static void __internal_irq_unmask_##widt
|
||||
u32 irq_mask_addr = get_irq_mask_addr(cpu); \
|
||||
\
|
||||
val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \
|
||||
- val |= (1 << bit); \
|
||||
+ if (cpu_isset(cpu, *dest)) \
|
||||
+ val |= (1 << bit); \
|
||||
+ else \
|
||||
+ val &= ~(1 << bit); \
|
||||
bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \
|
||||
} \
|
||||
}
|
||||
@@ -413,7 +420,7 @@ static void bcm63xx_internal_irq_unmask(
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&ipic_lock, flags);
|
||||
- internal_irq_unmask(d->irq - IRQ_INTERNAL_BASE);
|
||||
+ internal_irq_unmask(d->irq - IRQ_INTERNAL_BASE, cpu_online_mask);
|
||||
spin_unlock_irqrestore(&ipic_lock, flags);
|
||||
}
|
||||
|
||||
@ -0,0 +1,98 @@ |
||||
From 0e692ab15a69ac4534c18e67ed3cb7685f728037 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Gorski <jogo@openwrt.org>
|
||||
Date: Tue, 30 Apr 2013 11:26:53 +0200
|
||||
Subject: [PATCH 13/14] MIPS: BCM63XX: use irq_desc as argument for (un)mask
|
||||
|
||||
In preparation for applying affinity, use the irq descriptor as the
|
||||
argument for (un)mask.
|
||||
|
||||
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
||||
---
|
||||
arch/mips/bcm63xx/irq.c | 26 ++++++++++++++------------
|
||||
1 file changed, 14 insertions(+), 12 deletions(-)
|
||||
|
||||
--- a/arch/mips/bcm63xx/irq.c
|
||||
+++ b/arch/mips/bcm63xx/irq.c
|
||||
@@ -22,10 +22,10 @@
|
||||
|
||||
static void __dispatch_internal_32(int cpu) __maybe_unused;
|
||||
static void __dispatch_internal_64(int cpu) __maybe_unused;
|
||||
-static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
|
||||
-static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
|
||||
-static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
|
||||
-static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
|
||||
+static void __internal_irq_mask_32(struct irq_data *d) __maybe_unused;
|
||||
+static void __internal_irq_mask_64(struct irq_data *d) __maybe_unused;
|
||||
+static void __internal_irq_unmask_32(struct irq_data *d) __maybe_unused;
|
||||
+static void __internal_irq_unmask_64(struct irq_data *d) __maybe_unused;
|
||||
|
||||
static DEFINE_SPINLOCK(ipic_lock);
|
||||
static DEFINE_SPINLOCK(epic_lock);
|
||||
@@ -167,8 +167,8 @@ static int is_ext_irq_cascaded;
|
||||
static unsigned int ext_irq_count;
|
||||
static unsigned int ext_irq_start, ext_irq_end;
|
||||
static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
|
||||
-static void (*internal_irq_mask)(unsigned int irq);
|
||||
-static void (*internal_irq_unmask)(unsigned int irq);
|
||||
+static void (*internal_irq_mask)(struct irq_data *d);
|
||||
+static void (*internal_irq_unmask)(struct irq_data *d);
|
||||
|
||||
static void bcm63xx_init_irq(void)
|
||||
{
|
||||
@@ -358,9 +358,10 @@ void __dispatch_internal_##width(int cpu
|
||||
} \
|
||||
} \
|
||||
\
|
||||
-static void __internal_irq_mask_##width(unsigned int irq) \
|
||||
+static void __internal_irq_mask_##width(struct irq_data *d) \
|
||||
{ \
|
||||
u32 val; \
|
||||
+ unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
|
||||
unsigned reg = (irq / 32) ^ (width/32 - 1); \
|
||||
unsigned bit = irq & 0x1f; \
|
||||
unsigned long flags; \
|
||||
@@ -380,9 +381,10 @@ static void __internal_irq_mask_##width(
|
||||
spin_unlock_irqrestore(&ipic_lock, flags); \
|
||||
} \
|
||||
\
|
||||
-static void __internal_irq_unmask_##width(unsigned int irq) \
|
||||
+static void __internal_irq_unmask_##width(struct irq_data *d) \
|
||||
{ \
|
||||
u32 val; \
|
||||
+ unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
|
||||
unsigned reg = (irq / 32) ^ (width/32 - 1); \
|
||||
unsigned bit = irq & 0x1f; \
|
||||
unsigned long flags; \
|
||||
@@ -448,12 +450,12 @@ asmlinkage void plat_irq_dispatch(void)
|
||||
*/
|
||||
static void bcm63xx_internal_irq_mask(struct irq_data *d)
|
||||
{
|
||||
- internal_irq_mask(d->irq - IRQ_INTERNAL_BASE);
|
||||
+ internal_irq_mask(d);
|
||||
}
|
||||
|
||||
static void bcm63xx_internal_irq_unmask(struct irq_data *d)
|
||||
{
|
||||
- internal_irq_unmask(d->irq - IRQ_INTERNAL_BASE);
|
||||
+ internal_irq_unmask(d);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -479,7 +481,7 @@ static void bcm63xx_external_irq_mask(st
|
||||
spin_unlock_irqrestore(&epic_lock, flags);
|
||||
|
||||
if (is_ext_irq_cascaded)
|
||||
- internal_irq_mask(irq + ext_irq_start);
|
||||
+ internal_irq_mask(irq_get_irq_data(irq + ext_irq_start));
|
||||
}
|
||||
|
||||
static void bcm63xx_external_irq_unmask(struct irq_data *d)
|
||||
@@ -501,7 +503,7 @@ static void bcm63xx_external_irq_unmask(
|
||||
spin_unlock_irqrestore(&epic_lock, flags);
|
||||
|
||||
if (is_ext_irq_cascaded)
|
||||
- internal_irq_unmask(irq + ext_irq_start);
|
||||
+ internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start));
|
||||
}
|
||||
|
||||
static void bcm63xx_external_irq_clear(struct irq_data *d)
|
||||
@ -1,65 +0,0 @@ |
||||
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
@@ -37,6 +37,7 @@
|
||||
#include <pci_rt2x00_fixup.h>
|
||||
|
||||
#include <uapi/linux/bcm963xx_tag.h>
|
||||
+#include <uapi/linux/bcm933xx_hcs.h>
|
||||
|
||||
#define PFX "board_bcm963xx: "
|
||||
|
||||
@@ -45,6 +46,7 @@
|
||||
|
||||
#define CFE_OFFSET_64K 0x10000
|
||||
#define CFE_OFFSET_128K 0x20000
|
||||
+#define HCS_OFFSET_128K 0x20000
|
||||
|
||||
static struct board_info board;
|
||||
|
||||
@@ -782,8 +784,9 @@ void __init board_prom_init(void)
|
||||
unsigned int i;
|
||||
u8 *boot_addr, *cfe;
|
||||
char cfe_version[32];
|
||||
- char *board_name;
|
||||
+ char *board_name = NULL;
|
||||
u32 val;
|
||||
+ struct bcm_hcs *hcs;
|
||||
|
||||
/* read base address of boot chip select (0)
|
||||
* 6328/6362 do not have MPI but boot from a fixed address
|
||||
@@ -812,9 +815,13 @@ void __init board_prom_init(void)
|
||||
if (strcmp(cfe_version, "unknown") != 0) {
|
||||
/* cfe present */
|
||||
boardid_fixup(boot_addr);
|
||||
+
|
||||
+ board_name = bcm63xx_nvram_get_name();
|
||||
+ } else if (BCMCPU_IS_3368()) {
|
||||
+ hcs = (struct bcm_hcs *)KSEG1ADDR(0x1fc00000 + HCS_OFFSET_128K);
|
||||
+ board_name = hcs->filename;
|
||||
}
|
||||
|
||||
- board_name = bcm63xx_nvram_get_name();
|
||||
/* find board by name */
|
||||
for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
|
||||
if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
|
||||
--- /dev/null
|
||||
+++ b/include/uapi/linux/bcm933xx_hcs.h
|
||||
@@ -0,0 +1,18 @@
|
||||
+#ifndef __BCM_HCS_H
|
||||
+#define __BCM_HCS_H
|
||||
+
|
||||
+struct bcm_hcs {
|
||||
+ uint16_t magic;
|
||||
+ uint16_t control;
|
||||
+ uint16_t rev_maj;
|
||||
+ uint16_t rev_min;
|
||||
+ uint32_t build_date;
|
||||
+ uint32_t filelen;
|
||||
+ uint32_t ldaddress;
|
||||
+ char filename[64];
|
||||
+ uint16_t hcs;
|
||||
+ uint16_t her_znaet_chto;
|
||||
+ uint32_t crc;
|
||||
+};
|
||||
+
|
||||
+#endif /* __BCM_HCS */
|
||||
@ -1,54 +0,0 @@ |
||||
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
||||
@@ -69,6 +69,41 @@
|
||||
static struct board_info board;
|
||||
|
||||
/*
|
||||
+ * known 3368 boards
|
||||
+ */
|
||||
+#ifdef CONFIG_BCM63XX_CPU_3368
|
||||
+static struct board_info __initdata board_cvg834g = {
|
||||
+ .name = "CVG834G_E15R3921",
|
||||
+ .expected_cpu_id = 0x3368,
|
||||
+
|
||||
+ .has_uart0 = 1,
|
||||
+ .has_uart1 = 1,
|
||||
+
|
||||
+ .has_enet0 = 1,
|
||||
+ .has_pci = 1,
|
||||
+
|
||||
+ .enet0 = {
|
||||
+ .has_phy = 1,
|
||||
+ .use_internal_phy = 1,
|
||||
+ },
|
||||
+
|
||||
+ .leds = {
|
||||
+ {
|
||||
+ .name = "CVG834G::switch-reset",
|
||||
+ .gpio = 36,
|
||||
+ .default_trigger= "default-on",
|
||||
+ },
|
||||
+
|
||||
+ {
|
||||
+ .name = "CVG834G:green:power",
|
||||
+ .gpio = 37,
|
||||
+ .default_trigger= "default-on",
|
||||
+ },
|
||||
+ },
|
||||
+};
|
||||
+#endif
|
||||
+
|
||||
+/*
|
||||
* known 6328 boards
|
||||
*/
|
||||
#ifdef CONFIG_BCM63XX_CPU_6328
|
||||
@@ -3884,6 +3919,9 @@ static struct board_info __initdata boar
|
||||
* all boards
|
||||
*/
|
||||
static const struct board_info __initconst *bcm963xx_boards[] = {
|
||||
+#ifdef CONFIG_BCM63XX_CPU_3368
|
||||
+ &board_cvg834g,
|
||||
+#endif
|
||||
#ifdef CONFIG_BCM63XX_CPU_6328
|
||||
&board_96328avng,
|
||||
&board_96328A_1241N,
|
||||
Loading…
Reference in new issue