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@ -273,16 +273,6 @@ static void ath79_set_speed_ge1(int speed) |
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ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed); |
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} |
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static void ar724x_set_speed_ge0(int speed) |
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{ |
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/* TODO */ |
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} |
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static void ar724x_set_speed_ge1(int speed) |
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{ |
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/* TODO */ |
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} |
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static void ar7242_set_speed_ge0(int speed) |
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{ |
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u32 val = ath79_get_eth_pll(0, speed); |
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@ -311,24 +301,13 @@ static void ar91xx_set_speed_ge1(int speed) |
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ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed); |
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} |
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static void ar933x_set_speed_ge0(int speed) |
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{ |
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/* TODO */ |
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} |
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static void ar933x_set_speed_ge1(int speed) |
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{ |
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/* TODO */ |
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} |
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static void ar934x_set_speed_ge0(int speed) |
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{ |
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/* TODO */ |
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} |
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static void ar934x_set_speed_ge1(int speed) |
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static void ath79_set_speed_dummy(int speed) |
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{ |
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/* TODO */ |
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} |
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static void ath79_ddr_no_flush(void) |
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@ -703,7 +682,7 @@ void __init ath79_register_eth(unsigned int id) |
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pdata->reset_bit |= AR724X_RESET_GE1_MDIO | |
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AR71XX_RESET_GE1_PHY; |
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pdata->ddr_flush = ar724x_ddr_flush_ge1; |
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pdata->set_speed = ar724x_set_speed_ge1; |
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pdata->set_speed = ath79_set_speed_dummy; |
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} |
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pdata->has_gbit = 1; |
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pdata->is_ar724x = 1; |
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@ -726,13 +705,13 @@ void __init ath79_register_eth(unsigned int id) |
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if (id == 0) { |
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pdata->reset_bit |= AR71XX_RESET_GE0_PHY; |
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pdata->ddr_flush = ar724x_ddr_flush_ge0; |
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pdata->set_speed = ar724x_set_speed_ge0; |
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pdata->set_speed = ath79_set_speed_dummy; |
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pdata->phy_mask = BIT(4); |
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} else { |
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pdata->reset_bit |= AR71XX_RESET_GE1_PHY; |
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pdata->ddr_flush = ar724x_ddr_flush_ge1; |
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pdata->set_speed = ar724x_set_speed_ge1; |
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pdata->set_speed = ath79_set_speed_dummy; |
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pdata->speed = SPEED_1000; |
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pdata->duplex = DUPLEX_FULL; |
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@ -780,14 +759,14 @@ void __init ath79_register_eth(unsigned int id) |
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pdata->reset_bit = AR933X_RESET_GE0_MAC | |
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AR933X_RESET_GE0_MDIO; |
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pdata->ddr_flush = ar933x_ddr_flush_ge0; |
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pdata->set_speed = ar933x_set_speed_ge0; |
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pdata->set_speed = ath79_set_speed_dummy; |
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pdata->phy_mask = BIT(4); |
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} else { |
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pdata->reset_bit = AR933X_RESET_GE1_MAC | |
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AR933X_RESET_GE1_MDIO; |
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pdata->ddr_flush = ar933x_ddr_flush_ge1; |
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pdata->set_speed = ar933x_set_speed_ge1; |
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pdata->set_speed = ath79_set_speed_dummy; |
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pdata->speed = SPEED_1000; |
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pdata->duplex = DUPLEX_FULL; |
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@ -815,7 +794,7 @@ void __init ath79_register_eth(unsigned int id) |
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} else { |
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pdata->reset_bit = AR934X_RESET_GE1_MAC | |
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AR934X_RESET_GE1_MDIO; |
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pdata->set_speed = ar934x_set_speed_ge1; |
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pdata->set_speed = ath79_set_speed_dummy; |
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pdata->switch_data = &ath79_switch_data; |
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} |
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