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@ -482,6 +482,26 @@ static inline u32 ar71xx_usb_ctrl_rr(unsigned reg) |
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#define AR91XX_GPIO_COUNT 22 |
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#define AR933X_GPIO_FUNC_SPDIF2TCK BIT(31) |
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#define AR933X_GPIO_FUNC_SPDIF_EN BIT(30) |
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#define AR933X_GPIO_FUNC_I2SO_22_18_EN BIT(29) |
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#define AR933X_GPIO_FUNC_I2S_MCK_EN BIT(27) |
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#define AR933X_GPIO_FUNC_I2SO_EN BIT(26) |
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#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_DUPL BIT(25) |
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#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_COLL BIT(24) |
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#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_ACT BIT(23) |
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#define AR933X_GPIO_FUNC_SPI_EN BIT(18) |
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#define AR933X_GPIO_FUNC_SPI_CS_EN2 BIT(14) |
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#define AR933X_GPIO_FUNC_SPI_CS_EN1 BIT(13) |
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#define AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7) |
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#define AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6) |
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#define AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5) |
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#define AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4) |
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#define AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3) |
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#define AR933X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2) |
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#define AR933X_GPIO_FUNC_UART_EN BIT(1) |
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#define AR933X_GPIO_FUNC_JTAG_DISABLE BIT(0) |
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#define AR933X_GPIO_COUNT 30 |
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#define AR934X_GPIO_FUNC_SPI_CS_1_EN BIT(14) |
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@ -637,6 +657,7 @@ void ar71xx_ddr_flush(u32 reg); |
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#define AR933X_RESET_REG_RESET_MODULE 0x1c |
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#define AR933X_RESET_REG_BOOTSTRAP 0xac |
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#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18) |
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#define AR933X_BOOTSTRAP_EEPBUSY BIT(4) |
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#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) |
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