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@ -6899,7 +6899,7 @@ diff -urN linux-2.6.19/arch/mips/bcm963xx/irq.c linux-2.6.19.new/arch/mips/bcm96 |
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+ irq_desc[i].status = IRQ_DISABLED;
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+ irq_desc[i].status = IRQ_DISABLED;
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+ irq_desc[i].action = 0;
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+ irq_desc[i].action = 0;
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+ irq_desc[i].depth = 1;
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+ irq_desc[i].depth = 1;
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+ irq_desc[i].handler_data = &brcm_irq_type;
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+ irq_desc[i].chip = &brcm_irq_type;
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+ }
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+ }
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+}
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+}
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+
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+
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@ -6941,7 +6941,7 @@ diff -urN linux-2.6.19/arch/mips/bcm963xx/irq.c linux-2.6.19.new/arch/mips/bcm96 |
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+ * explicitly call BcmHalInterruptEnable or enable_brcm_irq. This behavior
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+ * explicitly call BcmHalInterruptEnable or enable_brcm_irq. This behavior
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+ * is consistent with interrupt handling on VxWorks.
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+ * is consistent with interrupt handling on VxWorks.
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+ */
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+ */
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+ irq_desc[interruptId].handler_data = &brcm_irq_no_end_type;
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+ irq_desc[interruptId].chip = &brcm_irq_no_end_type;
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+
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+
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+ if( interruptId >= INTERNAL_ISR_TABLE_OFFSET )
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+ if( interruptId >= INTERNAL_ISR_TABLE_OFFSET )
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+ {
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+ {
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@ -7297,7 +7297,7 @@ diff -urN linux-2.6.19/arch/mips/bcm963xx/ser_init.c linux-2.6.19.new/arch/mips/ |
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diff -urN linux-2.6.19/arch/mips/bcm963xx/setup.c linux-2.6.19.new/arch/mips/bcm963xx/setup.c
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diff -urN linux-2.6.19/arch/mips/bcm963xx/setup.c linux-2.6.19.new/arch/mips/bcm963xx/setup.c
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--- linux-2.6.19/arch/mips/bcm963xx/setup.c 1970-01-01 01:00:00.000000000 +0100
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--- linux-2.6.19/arch/mips/bcm963xx/setup.c 1970-01-01 01:00:00.000000000 +0100
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+++ linux-2.6.19.new/arch/mips/bcm963xx/setup.c 2006-12-16 18:46:31.000000000 +0100
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+++ linux-2.6.19.new/arch/mips/bcm963xx/setup.c 2006-12-16 18:46:31.000000000 +0100
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@@ -0,0 +1,524 @@
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@@ -0,0 +1,523 @@
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+/*
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+/*
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+<:copyright-gpl
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+<:copyright-gpl
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+ Copyright 2002 Broadcom Corp. All Rights Reserved.
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+ Copyright 2002 Broadcom Corp. All Rights Reserved.
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@ -7341,7 +7341,6 @@ diff -urN linux-2.6.19/arch/mips/bcm963xx/setup.c linux-2.6.19.new/arch/mips/bcm |
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+#include <asm/gdb-stub.h>
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+#include <asm/gdb-stub.h>
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+
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+
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+extern void brcm_time_init(void);
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+extern void brcm_time_init(void);
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+extern void brcm_timer_setup(struct irqaction *irq);
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+extern unsigned long getMemorySize(void);
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+extern unsigned long getMemorySize(void);
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+
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+
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+#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
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+#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
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@ -7831,7 +7830,7 @@ diff -urN linux-2.6.19/arch/mips/bcm963xx/softdsl/AdslCoreDefs.h linux-2.6.19.ne |
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diff -urN linux-2.6.19/arch/mips/bcm963xx/time.c linux-2.6.19.new/arch/mips/bcm963xx/time.c
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diff -urN linux-2.6.19/arch/mips/bcm963xx/time.c linux-2.6.19.new/arch/mips/bcm963xx/time.c
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--- linux-2.6.19/arch/mips/bcm963xx/time.c 1970-01-01 01:00:00.000000000 +0100
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--- linux-2.6.19/arch/mips/bcm963xx/time.c 1970-01-01 01:00:00.000000000 +0100
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+++ linux-2.6.19.new/arch/mips/bcm963xx/time.c 2006-12-16 18:46:31.000000000 +0100
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+++ linux-2.6.19.new/arch/mips/bcm963xx/time.c 2006-12-16 18:46:31.000000000 +0100
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@@ -0,0 +1,119 @@
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@@ -0,0 +1,114 @@
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+/*
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+/*
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+<:copyright-gpl
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+<:copyright-gpl
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+ Copyright 2004 Broadcom Corp. All Rights Reserved.
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+ Copyright 2004 Broadcom Corp. All Rights Reserved.
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@ -7940,17 +7939,12 @@ diff -urN linux-2.6.19/arch/mips/bcm963xx/time.c linux-2.6.19.new/arch/mips/bcm9 |
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+}
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+}
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+
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+
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+
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+
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+void __init brcm_timer_setup(struct irqaction *irq)
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+void __init plat_timer_setup(struct irqaction *irq)
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+{
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+{
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+ r4k_cur = (read_c0_count() + r4k_offset);
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+ r4k_cur = (read_c0_count() + r4k_offset);
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+ write_c0_compare(r4k_cur);
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+ write_c0_compare(r4k_cur);
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+ set_c0_status(IE_IRQ5);
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+ set_c0_status(IE_IRQ5);
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+}
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+}
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+
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+void __init plat_timer_setup(struct irqaction *irq)
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+{
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+ brcm_timer_setup(irq);
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+}
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diff -urN linux-2.6.19/arch/mips/kernel/cpu-probe.c linux-2.6.19.new/arch/mips/kernel/cpu-probe.c
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diff -urN linux-2.6.19/arch/mips/kernel/cpu-probe.c linux-2.6.19.new/arch/mips/kernel/cpu-probe.c
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--- linux-2.6.19/arch/mips/kernel/cpu-probe.c 2006-11-29 22:57:37.000000000 +0100
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--- linux-2.6.19/arch/mips/kernel/cpu-probe.c 2006-11-29 22:57:37.000000000 +0100
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+++ linux-2.6.19.new/arch/mips/kernel/cpu-probe.c 2006-12-16 18:46:31.000000000 +0100
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+++ linux-2.6.19.new/arch/mips/kernel/cpu-probe.c 2006-12-16 18:46:31.000000000 +0100
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