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@ -407,48 +407,14 @@ static void ath79_set_speed_dummy(int speed) |
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{ |
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} |
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static void ath79_ddr_no_flush(void) |
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{ |
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} |
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static void ath79_ddr_flush_ge0(void) |
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{ |
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ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE0); |
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ath79_ddr_wb_flush(0); |
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} |
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static void ath79_ddr_flush_ge1(void) |
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{ |
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ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE1); |
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} |
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static void ar724x_ddr_flush_ge0(void) |
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{ |
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ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_GE0); |
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} |
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static void ar724x_ddr_flush_ge1(void) |
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{ |
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ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_GE1); |
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} |
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static void ar91xx_ddr_flush_ge0(void) |
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{ |
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ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_GE0); |
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} |
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static void ar91xx_ddr_flush_ge1(void) |
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{ |
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ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_GE1); |
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} |
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static void ar933x_ddr_flush_ge0(void) |
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{ |
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ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE0); |
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} |
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static void ar933x_ddr_flush_ge1(void) |
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{ |
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ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE1); |
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ath79_ddr_wb_flush(1); |
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} |
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static struct resource ath79_eth0_resources[] = { |
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@ -879,26 +845,25 @@ void __init ath79_register_eth(unsigned int id) |
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return; |
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} |
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if (id == 0) |
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pdata->ddr_flush = ath79_ddr_flush_ge0; |
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else |
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pdata->ddr_flush = ath79_ddr_flush_ge1; |
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switch (ath79_soc) { |
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case ATH79_SOC_AR7130: |
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if (id == 0) { |
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pdata->ddr_flush = ath79_ddr_flush_ge0; |
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if (id == 0) |
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pdata->set_speed = ath79_set_speed_ge0; |
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} else { |
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pdata->ddr_flush = ath79_ddr_flush_ge1; |
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else |
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pdata->set_speed = ath79_set_speed_ge1; |
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} |
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break; |
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case ATH79_SOC_AR7141: |
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case ATH79_SOC_AR7161: |
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if (id == 0) { |
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pdata->ddr_flush = ath79_ddr_flush_ge0; |
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if (id == 0) |
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pdata->set_speed = ath79_set_speed_ge0; |
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} else { |
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pdata->ddr_flush = ath79_ddr_flush_ge1; |
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else |
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pdata->set_speed = ath79_set_speed_ge1; |
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} |
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pdata->has_gbit = 1; |
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break; |
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@ -906,12 +871,10 @@ void __init ath79_register_eth(unsigned int id) |
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if (id == 0) { |
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pdata->reset_bit |= AR724X_RESET_GE0_MDIO | |
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AR71XX_RESET_GE0_PHY; |
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pdata->ddr_flush = ar724x_ddr_flush_ge0; |
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pdata->set_speed = ar7242_set_speed_ge0; |
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} else { |
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pdata->reset_bit |= AR724X_RESET_GE1_MDIO | |
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AR71XX_RESET_GE1_PHY; |
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pdata->ddr_flush = ar724x_ddr_flush_ge1; |
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pdata->set_speed = ath79_set_speed_dummy; |
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} |
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pdata->has_gbit = 1; |
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@ -934,13 +897,11 @@ void __init ath79_register_eth(unsigned int id) |
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case ATH79_SOC_AR7240: |
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if (id == 0) { |
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pdata->reset_bit |= AR71XX_RESET_GE0_PHY; |
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pdata->ddr_flush = ar724x_ddr_flush_ge0; |
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pdata->set_speed = ath79_set_speed_dummy; |
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pdata->phy_mask = BIT(4); |
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} else { |
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pdata->reset_bit |= AR71XX_RESET_GE1_PHY; |
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pdata->ddr_flush = ar724x_ddr_flush_ge1; |
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pdata->set_speed = ath79_set_speed_dummy; |
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pdata->speed = SPEED_1000; |
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@ -962,27 +923,15 @@ void __init ath79_register_eth(unsigned int id) |
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pdata->fifo_cfg3 = 0x01f00140; |
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break; |
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case ATH79_SOC_AR9130: |
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if (id == 0) { |
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pdata->ddr_flush = ar91xx_ddr_flush_ge0; |
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pdata->set_speed = ar91xx_set_speed_ge0; |
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} else { |
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pdata->ddr_flush = ar91xx_ddr_flush_ge1; |
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pdata->set_speed = ar91xx_set_speed_ge1; |
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} |
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pdata->is_ar91xx = 1; |
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break; |
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case ATH79_SOC_AR9132: |
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if (id == 0) { |
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pdata->ddr_flush = ar91xx_ddr_flush_ge0; |
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pdata->has_gbit = 1; |
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/* fall through */ |
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case ATH79_SOC_AR9130: |
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if (id == 0) |
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pdata->set_speed = ar91xx_set_speed_ge0; |
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} else { |
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pdata->ddr_flush = ar91xx_ddr_flush_ge1; |
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else |
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pdata->set_speed = ar91xx_set_speed_ge1; |
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} |
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pdata->is_ar91xx = 1; |
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pdata->has_gbit = 1; |
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break; |
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case ATH79_SOC_AR9330: |
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@ -990,14 +939,12 @@ void __init ath79_register_eth(unsigned int id) |
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if (id == 0) { |
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pdata->reset_bit = AR933X_RESET_GE0_MAC | |
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AR933X_RESET_GE0_MDIO; |
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pdata->ddr_flush = ar933x_ddr_flush_ge0; |
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pdata->set_speed = ath79_set_speed_dummy; |
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pdata->phy_mask = BIT(4); |
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} else { |
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pdata->reset_bit = AR933X_RESET_GE1_MAC | |
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AR933X_RESET_GE1_MDIO; |
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pdata->ddr_flush = ar933x_ddr_flush_ge1; |
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pdata->set_speed = ath79_set_speed_dummy; |
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pdata->speed = SPEED_1000; |
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@ -1038,7 +985,6 @@ void __init ath79_register_eth(unsigned int id) |
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ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH); |
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} |
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pdata->ddr_flush = ath79_ddr_no_flush; |
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pdata->has_gbit = 1; |
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pdata->is_ar724x = 1; |
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@ -1073,7 +1019,6 @@ void __init ath79_register_eth(unsigned int id) |
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ath79_switch_data.phy_poll_mask |= BIT(4); |
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} |
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pdata->ddr_flush = ath79_ddr_no_flush; |
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pdata->has_gbit = 1; |
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pdata->is_ar724x = 1; |
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@ -1097,7 +1042,6 @@ void __init ath79_register_eth(unsigned int id) |
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pdata->set_speed = qca955x_set_speed_sgmii; |
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} |
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pdata->ddr_flush = ath79_ddr_no_flush; |
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pdata->has_gbit = 1; |
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pdata->is_ar724x = 1; |
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@ -1145,7 +1089,6 @@ void __init ath79_register_eth(unsigned int id) |
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ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH); |
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} |
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pdata->ddr_flush = ath79_ddr_no_flush; |
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pdata->has_gbit = 1; |
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pdata->is_ar724x = 1; |
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