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@ -27,10 +27,6 @@ |
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#define RTL8366RB_PHY_PAGE_MAX 7 |
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#define RTL8366RB_PHY_PAGE_MAX 7 |
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#define RTL8366RB_PHY_ADDR_MAX 31 |
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#define RTL8366RB_PHY_ADDR_MAX 31 |
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#define RTL8366RB_CHIP_GLOBAL_CTRL_REG 0x0000 |
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#define RTL8366RB_CHIP_CTRL_VLAN (1 << 13) |
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#define RTL8366RB_CHIP_CTRL_VLAN_4KTB (1 << 14) |
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/* Switch Global Configuration register */ |
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/* Switch Global Configuration register */ |
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#define RTL8366RB_SGCR 0x0000 |
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#define RTL8366RB_SGCR 0x0000 |
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#define RTL8366RB_SGCR_EN_BC_STORM_CTRL BIT(0) |
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#define RTL8366RB_SGCR_EN_BC_STORM_CTRL BIT(0) |
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@ -40,6 +36,8 @@ |
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#define RTL8366RB_SGCR_MAX_LENGTH_1536 RTL8366RB_SGCR_MAX_LENGTH(0x1) |
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#define RTL8366RB_SGCR_MAX_LENGTH_1536 RTL8366RB_SGCR_MAX_LENGTH(0x1) |
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#define RTL8366RB_SGCR_MAX_LENGTH_1552 RTL8366RB_SGCR_MAX_LENGTH(0x2) |
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#define RTL8366RB_SGCR_MAX_LENGTH_1552 RTL8366RB_SGCR_MAX_LENGTH(0x2) |
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#define RTL8366RB_SGCR_MAX_LENGTH_9216 RTL8366RB_SGCR_MAX_LENGTH(0x3) |
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#define RTL8366RB_SGCR_MAX_LENGTH_9216 RTL8366RB_SGCR_MAX_LENGTH(0x3) |
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#define RTL8366RB_SGCR_EN_VLAN BIT(13) |
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#define RTL8366RB_SGCR_EN_VLAN_4KTB BIT(14) |
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/* Port Enable Control register */ |
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/* Port Enable Control register */ |
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#define RTL8366RB_PECR 0x0001 |
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#define RTL8366RB_PECR 0x0001 |
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@ -655,16 +653,15 @@ static int rtl8366rb_set_mc_index(struct rtl8366_smi *smi, int port, int index) |
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static int rtl8366rb_vlan_set_vlan(struct rtl8366_smi *smi, int enable) |
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static int rtl8366rb_vlan_set_vlan(struct rtl8366_smi *smi, int enable) |
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{ |
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{ |
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return rtl8366_smi_rmwr(smi, RTL8366RB_CHIP_GLOBAL_CTRL_REG, |
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return rtl8366_smi_rmwr(smi, RTL8366RB_SGCR, RTL8366RB_SGCR_EN_VLAN, |
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RTL8366RB_CHIP_CTRL_VLAN, |
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(enable) ? RTL8366RB_SGCR_EN_VLAN : 0); |
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(enable) ? RTL8366RB_CHIP_CTRL_VLAN : 0); |
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} |
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} |
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static int rtl8366rb_vlan_set_4ktable(struct rtl8366_smi *smi, int enable) |
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static int rtl8366rb_vlan_set_4ktable(struct rtl8366_smi *smi, int enable) |
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{ |
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{ |
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return rtl8366_smi_rmwr(smi, RTL8366RB_CHIP_GLOBAL_CTRL_REG, |
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return rtl8366_smi_rmwr(smi, RTL8366RB_SGCR, |
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RTL8366RB_CHIP_CTRL_VLAN_4KTB, |
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RTL8366RB_SGCR_EN_VLAN_4KTB, |
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(enable) ? RTL8366RB_CHIP_CTRL_VLAN_4KTB : 0); |
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(enable) ? RTL8366RB_SGCR_EN_VLAN_4KTB : 0); |
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} |
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} |
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static int rtl8366rb_sw_reset_mibs(struct switch_dev *dev, |
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static int rtl8366rb_sw_reset_mibs(struct switch_dev *dev, |
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@ -689,16 +686,16 @@ static int rtl8366rb_sw_get_vlan_enable(struct switch_dev *dev, |
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u32 data; |
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u32 data; |
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if (attr->ofs == 1) { |
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if (attr->ofs == 1) { |
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rtl8366_smi_read_reg(smi, RTL8366RB_CHIP_GLOBAL_CTRL_REG, &data); |
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rtl8366_smi_read_reg(smi, RTL8366RB_SGCR, &data); |
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if (data & RTL8366RB_CHIP_CTRL_VLAN) |
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if (data & RTL8366RB_SGCR_EN_VLAN) |
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val->value.i = 1; |
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val->value.i = 1; |
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else |
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else |
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val->value.i = 0; |
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val->value.i = 0; |
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} else if (attr->ofs == 2) { |
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} else if (attr->ofs == 2) { |
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rtl8366_smi_read_reg(smi, RTL8366RB_CHIP_GLOBAL_CTRL_REG, &data); |
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rtl8366_smi_read_reg(smi, RTL8366RB_SGCR, &data); |
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if (data & RTL8366RB_CHIP_CTRL_VLAN_4KTB) |
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if (data & RTL8366RB_SGCR_EN_VLAN_4KTB) |
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val->value.i = 1; |
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val->value.i = 1; |
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else |
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else |
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val->value.i = 0; |
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val->value.i = 0; |
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