This board is very old and unlikely to still be relevant today. Support for it contains a significant amount of device specific baggage which is worth getting rid of. Signed-off-by: Felix Fietkau <nbd@nbd.name>master
parent
fa04682f21
commit
441ee62931
@ -1,275 +0,0 @@ |
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/*
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* Atheros AP83 board support |
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* |
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* Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> |
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 as published |
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* by the Free Software Foundation. |
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*/ |
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#include <linux/delay.h> |
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#include <linux/platform_device.h> |
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#include <linux/mtd/mtd.h> |
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#include <linux/mtd/partitions.h> |
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#include <linux/mtd/physmap.h> |
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#include <linux/spi/spi.h> |
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#include <linux/spi/spi_gpio.h> |
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#include <linux/spi/vsc7385.h> |
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#include <asm/mach-ath79/ar71xx_regs.h> |
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#include <asm/mach-ath79/ath79.h> |
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#include "dev-eth.h" |
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#include "dev-gpio-buttons.h" |
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#include "dev-leds-gpio.h" |
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#include "dev-usb.h" |
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#include "dev-wmac.h" |
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#include "machtypes.h" |
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#define AP83_GPIO_LED_WLAN 6 |
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#define AP83_GPIO_LED_POWER 14 |
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#define AP83_GPIO_LED_JUMPSTART 15 |
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#define AP83_GPIO_BTN_JUMPSTART 12 |
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#define AP83_GPIO_BTN_RESET 21 |
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#define AP83_050_GPIO_VSC7385_CS 1 |
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#define AP83_050_GPIO_VSC7385_MISO 3 |
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#define AP83_050_GPIO_VSC7385_MOSI 16 |
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#define AP83_050_GPIO_VSC7385_SCK 17 |
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#define AP83_KEYS_POLL_INTERVAL 20 /* msecs */ |
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#define AP83_KEYS_DEBOUNCE_INTERVAL (3 * AP83_KEYS_POLL_INTERVAL) |
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static struct mtd_partition ap83_flash_partitions[] = { |
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{ |
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.name = "u-boot", |
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.offset = 0, |
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.size = 0x040000, |
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.mask_flags = MTD_WRITEABLE, |
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}, { |
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.name = "u-boot-env", |
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.offset = 0x040000, |
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.size = 0x020000, |
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.mask_flags = MTD_WRITEABLE, |
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}, { |
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.name = "kernel", |
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.offset = 0x060000, |
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.size = 0x140000, |
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}, { |
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.name = "rootfs", |
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.offset = 0x1a0000, |
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.size = 0x650000, |
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}, { |
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.name = "art", |
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.offset = 0x7f0000, |
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.size = 0x010000, |
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.mask_flags = MTD_WRITEABLE, |
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}, { |
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.name = "firmware", |
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.offset = 0x060000, |
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.size = 0x790000, |
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} |
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}; |
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static struct physmap_flash_data ap83_flash_data = { |
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.width = 2, |
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.parts = ap83_flash_partitions, |
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.nr_parts = ARRAY_SIZE(ap83_flash_partitions), |
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}; |
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static struct resource ap83_flash_resources[] = { |
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[0] = { |
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.start = AR71XX_SPI_BASE, |
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.end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, |
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.flags = IORESOURCE_MEM, |
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}, |
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}; |
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static struct platform_device ap83_flash_device = { |
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.name = "ar91xx-flash", |
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.id = -1, |
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.resource = ap83_flash_resources, |
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.num_resources = ARRAY_SIZE(ap83_flash_resources), |
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.dev = { |
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.platform_data = &ap83_flash_data, |
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} |
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}; |
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static struct gpio_led ap83_leds_gpio[] __initdata = { |
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{ |
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.name = "ap83:green:jumpstart", |
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.gpio = AP83_GPIO_LED_JUMPSTART, |
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.active_low = 0, |
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}, { |
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.name = "ap83:green:power", |
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.gpio = AP83_GPIO_LED_POWER, |
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.active_low = 0, |
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}, { |
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.name = "ap83:green:wlan", |
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.gpio = AP83_GPIO_LED_WLAN, |
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.active_low = 0, |
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}, |
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}; |
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static struct gpio_keys_button ap83_gpio_keys[] __initdata = { |
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{ |
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.desc = "soft_reset", |
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.type = EV_KEY, |
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.code = KEY_RESTART, |
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.debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, |
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.gpio = AP83_GPIO_BTN_RESET, |
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.active_low = 1, |
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}, { |
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.desc = "jumpstart", |
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.type = EV_KEY, |
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.code = KEY_WPS_BUTTON, |
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.debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, |
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.gpio = AP83_GPIO_BTN_JUMPSTART, |
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.active_low = 1, |
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} |
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}; |
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static struct resource ap83_040_spi_resources[] = { |
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[0] = { |
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.start = AR71XX_SPI_BASE, |
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.end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, |
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.flags = IORESOURCE_MEM, |
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}, |
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}; |
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static struct platform_device ap83_040_spi_device = { |
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.name = "ap83-spi", |
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.id = 0, |
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.resource = ap83_040_spi_resources, |
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.num_resources = ARRAY_SIZE(ap83_040_spi_resources), |
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}; |
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static struct spi_gpio_platform_data ap83_050_spi_data = { |
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.miso = AP83_050_GPIO_VSC7385_MISO, |
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.mosi = AP83_050_GPIO_VSC7385_MOSI, |
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.sck = AP83_050_GPIO_VSC7385_SCK, |
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.num_chipselect = 1, |
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}; |
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static struct platform_device ap83_050_spi_device = { |
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.name = "spi_gpio", |
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.id = 0, |
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.dev = { |
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.platform_data = &ap83_050_spi_data, |
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} |
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}; |
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static void ap83_vsc7385_reset(void) |
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{ |
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ath79_device_reset_set(AR71XX_RESET_GE1_PHY); |
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udelay(10); |
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ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); |
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mdelay(50); |
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} |
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static struct vsc7385_platform_data ap83_vsc7385_data = { |
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.reset = ap83_vsc7385_reset, |
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.ucode_name = "vsc7385_ucode_ap83.bin", |
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.mac_cfg = { |
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.tx_ipg = 6, |
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.bit2 = 0, |
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.clk_sel = 3, |
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}, |
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}; |
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static struct spi_board_info ap83_spi_info[] = { |
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{ |
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.bus_num = 0, |
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.chip_select = 0, |
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.max_speed_hz = 25000000, |
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.modalias = "spi-vsc7385", |
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.platform_data = &ap83_vsc7385_data, |
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.controller_data = (void *) AP83_050_GPIO_VSC7385_CS, |
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} |
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}; |
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static void __init ap83_generic_setup(void) |
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{ |
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u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); |
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ath79_register_mdio(0, 0xfffffffe); |
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ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); |
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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ath79_eth0_data.phy_mask = 0x1; |
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ath79_register_eth(0); |
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ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); |
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
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ath79_eth1_data.speed = SPEED_1000; |
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ath79_eth1_data.duplex = DUPLEX_FULL; |
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ath79_eth1_pll_data.pll_1000 = 0x1f000000; |
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ath79_register_eth(1); |
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ath79_register_leds_gpio(-1, ARRAY_SIZE(ap83_leds_gpio), |
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ap83_leds_gpio); |
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ath79_register_gpio_keys_polled(-1, AP83_KEYS_POLL_INTERVAL, |
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ARRAY_SIZE(ap83_gpio_keys), |
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ap83_gpio_keys); |
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ath79_register_usb(); |
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ath79_register_wmac(eeprom, NULL); |
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platform_device_register(&ap83_flash_device); |
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spi_register_board_info(ap83_spi_info, ARRAY_SIZE(ap83_spi_info)); |
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} |
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static void ap83_040_flash_lock(struct platform_device *pdev) |
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{ |
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ath79_flash_acquire(); |
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} |
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static void ap83_040_flash_unlock(struct platform_device *pdev) |
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{ |
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ath79_flash_release(); |
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} |
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static void __init ap83_040_setup(void) |
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{ |
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ap83_flash_data.lock = ap83_040_flash_lock; |
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ap83_flash_data.unlock = ap83_040_flash_unlock; |
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ap83_generic_setup(); |
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platform_device_register(&ap83_040_spi_device); |
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} |
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static void __init ap83_050_setup(void) |
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{ |
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ap83_generic_setup(); |
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platform_device_register(&ap83_050_spi_device); |
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} |
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static void __init ap83_setup(void) |
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{ |
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u8 *board_id = (u8 *) KSEG1ADDR(0x1fff1244); |
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unsigned int board_version; |
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board_version = (unsigned int)(board_id[0] - '0'); |
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board_version += ((unsigned int)(board_id[1] - '0')) * 10; |
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switch (board_version) { |
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case 40: |
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ap83_040_setup(); |
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break; |
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case 50: |
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ap83_050_setup(); |
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break; |
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default: |
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printk(KERN_WARNING "AP83-%03u board is not yet supported\n", |
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board_version); |
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} |
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} |
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MIPS_MACHINE(ATH79_MACH_AP83, "AP83", "Atheros AP83", ap83_setup); |
@ -1,283 +0,0 @@ |
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/*
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* Atheros AP83 board specific SPI Controller driver |
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* |
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* Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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* |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/init.h> |
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#include <linux/delay.h> |
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#include <linux/spinlock.h> |
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#include <linux/workqueue.h> |
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#include <linux/platform_device.h> |
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#include <linux/io.h> |
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#include <linux/spi/spi.h> |
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#include <linux/spi/spi_bitbang.h> |
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#include <linux/bitops.h> |
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#include <linux/gpio.h> |
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#include <asm/mach-ath79/ath79.h> |
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#define DRV_DESC "Atheros AP83 board SPI Controller driver" |
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#define DRV_VERSION "0.1.0" |
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#define DRV_NAME "ap83-spi" |
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#define AP83_SPI_CLK_HIGH (1 << 23) |
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#define AP83_SPI_CLK_LOW 0 |
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#define AP83_SPI_MOSI_HIGH (1 << 22) |
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#define AP83_SPI_MOSI_LOW 0 |
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#define AP83_SPI_GPIO_CS 1 |
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#define AP83_SPI_GPIO_MISO 3 |
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struct ap83_spi { |
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struct spi_bitbang bitbang; |
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void __iomem *base; |
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u32 addr; |
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struct platform_device *pdev; |
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}; |
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static inline u32 ap83_spi_rr(struct ap83_spi *sp, u32 reg) |
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{ |
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return __raw_readl(sp->base + reg); |
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} |
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static inline struct ap83_spi *spidev_to_sp(struct spi_device *spi) |
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{ |
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return spi_master_get_devdata(spi->master); |
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} |
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static inline void setsck(struct spi_device *spi, int val) |
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{ |
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struct ap83_spi *sp = spidev_to_sp(spi); |
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if (val) |
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sp->addr |= AP83_SPI_CLK_HIGH; |
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else |
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sp->addr &= ~AP83_SPI_CLK_HIGH; |
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dev_dbg(&spi->dev, "addr=%08x, SCK set to %s\n", |
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sp->addr, (val) ? "HIGH" : "LOW"); |
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ap83_spi_rr(sp, sp->addr); |
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} |
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static inline void setmosi(struct spi_device *spi, int val) |
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{ |
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struct ap83_spi *sp = spidev_to_sp(spi); |
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if (val) |
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sp->addr |= AP83_SPI_MOSI_HIGH; |
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else |
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sp->addr &= ~AP83_SPI_MOSI_HIGH; |
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dev_dbg(&spi->dev, "addr=%08x, MOSI set to %s\n", |
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sp->addr, (val) ? "HIGH" : "LOW"); |
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ap83_spi_rr(sp, sp->addr); |
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} |
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static inline u32 getmiso(struct spi_device *spi) |
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{ |
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u32 ret; |
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ret = gpio_get_value(AP83_SPI_GPIO_MISO) ? 1 : 0; |
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dev_dbg(&spi->dev, "get MISO: %d\n", ret); |
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return ret; |
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} |
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static inline void do_spidelay(struct spi_device *spi, unsigned nsecs) |
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{ |
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ndelay(nsecs); |
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} |
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static void ap83_spi_chipselect(struct spi_device *spi, int on) |
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{ |
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struct ap83_spi *sp = spidev_to_sp(spi); |
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dev_dbg(&spi->dev, "set CS to %d\n", (on) ? 0 : 1); |
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if (on) { |
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ath79_flash_acquire(); |
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sp->addr = 0; |
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ap83_spi_rr(sp, sp->addr); |
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gpio_set_value(AP83_SPI_GPIO_CS, 0); |
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} else { |
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gpio_set_value(AP83_SPI_GPIO_CS, 1); |
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ath79_flash_release(); |
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} |
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} |
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#define spidelay(nsecs) \ |
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do { \
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/* Steal the spi_device pointer from our caller. \
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* The bitbang-API should probably get fixed here... */ \
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do_spidelay(spi, nsecs); \
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} while (0) |
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#define EXPAND_BITBANG_TXRX |
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#include <linux/spi/spi_bitbang.h> |
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#include "spi-bitbang-txrx.h" |
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static u32 ap83_spi_txrx_mode0(struct spi_device *spi, |
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unsigned nsecs, u32 word, u8 bits) |
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{ |
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dev_dbg(&spi->dev, "TXRX0 word=%08x, bits=%u\n", word, bits); |
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return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits); |
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} |
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static u32 ap83_spi_txrx_mode1(struct spi_device *spi, |
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unsigned nsecs, u32 word, u8 bits) |
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{ |
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dev_dbg(&spi->dev, "TXRX1 word=%08x, bits=%u\n", word, bits); |
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return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits); |
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} |
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static u32 ap83_spi_txrx_mode2(struct spi_device *spi, |
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unsigned nsecs, u32 word, u8 bits) |
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{ |
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dev_dbg(&spi->dev, "TXRX2 word=%08x, bits=%u\n", word, bits); |
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return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits); |
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} |
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static u32 ap83_spi_txrx_mode3(struct spi_device *spi, |
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unsigned nsecs, u32 word, u8 bits) |
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{ |
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dev_dbg(&spi->dev, "TXRX3 word=%08x, bits=%u\n", word, bits); |
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return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits); |
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} |
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static int ap83_spi_probe(struct platform_device *pdev) |
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{ |
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struct spi_master *master; |
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struct ap83_spi *sp; |
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struct ap83_spi_platform_data *pdata; |
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struct resource *r; |
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int ret; |
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ret = gpio_request(AP83_SPI_GPIO_MISO, "spi-miso"); |
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if (ret) { |
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dev_err(&pdev->dev, "gpio request failed for MISO\n"); |
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return ret; |
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} |
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ret = gpio_request(AP83_SPI_GPIO_CS, "spi-cs"); |
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if (ret) { |
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dev_err(&pdev->dev, "gpio request failed for CS\n"); |
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goto err_free_miso; |
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} |
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ret = gpio_direction_input(AP83_SPI_GPIO_MISO); |
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if (ret) { |
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dev_err(&pdev->dev, "unable to set direction of MISO\n"); |
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goto err_free_cs; |
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} |
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ret = gpio_direction_output(AP83_SPI_GPIO_CS, 0); |
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if (ret) { |
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dev_err(&pdev->dev, "unable to set direction of CS\n"); |
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goto err_free_cs; |
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} |
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master = spi_alloc_master(&pdev->dev, sizeof(*sp)); |
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if (master == NULL) { |
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dev_err(&pdev->dev, "failed to allocate spi master\n"); |
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return -ENOMEM; |
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} |
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sp = spi_master_get_devdata(master); |
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platform_set_drvdata(pdev, sp); |
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pdata = pdev->dev.platform_data; |
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sp->bitbang.master = spi_master_get(master); |
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sp->bitbang.chipselect = ap83_spi_chipselect; |
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sp->bitbang.txrx_word[SPI_MODE_0] = ap83_spi_txrx_mode0; |
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sp->bitbang.txrx_word[SPI_MODE_1] = ap83_spi_txrx_mode1; |
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sp->bitbang.txrx_word[SPI_MODE_2] = ap83_spi_txrx_mode2; |
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sp->bitbang.txrx_word[SPI_MODE_3] = ap83_spi_txrx_mode3; |
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sp->bitbang.master->bus_num = pdev->id; |
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sp->bitbang.master->num_chipselect = 1; |
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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if (r == NULL) { |
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ret = -ENOENT; |
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goto err_spi_put; |
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} |
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sp->base = ioremap_nocache(r->start, r->end - r->start + 1); |
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if (!sp->base) { |
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ret = -ENXIO; |
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goto err_spi_put; |
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} |
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ret = spi_bitbang_start(&sp->bitbang); |
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if (!ret) |
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goto err_unmap; |
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dev_info(&pdev->dev, "AP83 SPI adapter at %08x\n", r->start); |
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return 0; |
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err_unmap: |
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iounmap(sp->base); |
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err_spi_put: |
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platform_set_drvdata(pdev, NULL); |
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spi_master_put(sp->bitbang.master); |
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|
||||
err_free_cs: |
||||
gpio_free(AP83_SPI_GPIO_CS); |
||||
err_free_miso: |
||||
gpio_free(AP83_SPI_GPIO_MISO); |
||||
return ret; |
||||
} |
||||
|
||||
static int ap83_spi_remove(struct platform_device *pdev) |
||||
{ |
||||
struct ap83_spi *sp = platform_get_drvdata(pdev); |
||||
|
||||
spi_bitbang_stop(&sp->bitbang); |
||||
iounmap(sp->base); |
||||
platform_set_drvdata(pdev, NULL); |
||||
spi_master_put(sp->bitbang.master); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static struct platform_driver ap83_spi_drv = { |
||||
.probe = ap83_spi_probe, |
||||
.remove = ap83_spi_remove, |
||||
.driver = { |
||||
.name = DRV_NAME, |
||||
.owner = THIS_MODULE, |
||||
}, |
||||
}; |
||||
|
||||
static int __init ap83_spi_init(void) |
||||
{ |
||||
return platform_driver_register(&ap83_spi_drv); |
||||
} |
||||
module_init(ap83_spi_init); |
||||
|
||||
static void __exit ap83_spi_exit(void) |
||||
{ |
||||
platform_driver_unregister(&ap83_spi_drv); |
||||
} |
||||
module_exit(ap83_spi_exit); |
||||
|
||||
MODULE_ALIAS("platform:" DRV_NAME); |
||||
MODULE_DESCRIPTION(DRV_DESC); |
||||
MODULE_VERSION(DRV_VERSION); |
||||
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); |
||||
MODULE_LICENSE("GPL v2"); |
@ -1,27 +0,0 @@ |
||||
--- a/drivers/spi/Makefile
|
||||
+++ b/drivers/spi/Makefile
|
||||
@@ -12,6 +12,7 @@ obj-$(CONFIG_SPI_SPIDEV) += spidev.o
|
||||
# SPI master controller drivers (bus)
|
||||
obj-$(CONFIG_SPI_ALTERA) += spi-altera.o
|
||||
obj-$(CONFIG_SPI_ATMEL) += spi-atmel.o
|
||||
+obj-$(CONFIG_SPI_AP83) += spi-ap83.o
|
||||
obj-$(CONFIG_SPI_ATH79) += spi-ath79.o
|
||||
obj-$(CONFIG_SPI_AU1550) += spi-au1550.o
|
||||
obj-$(CONFIG_SPI_BCM2835) += spi-bcm2835.o
|
||||
--- a/drivers/spi/Kconfig
|
||||
+++ b/drivers/spi/Kconfig
|
||||
@@ -59,6 +59,14 @@ config SPI_ALTERA
|
||||
help
|
||||
This is the driver for the Altera SPI Controller.
|
||||
|
||||
+config SPI_AP83
|
||||
+ tristate "Atheros AP83 specific SPI Controller"
|
||||
+ depends on SPI_MASTER && ATH79_MACH_AP83
|
||||
+ select SPI_BITBANG
|
||||
+ help
|
||||
+ This is a specific SPI controller driver for the Atheros AP83
|
||||
+ reference board.
|
||||
+
|
||||
config SPI_ATH79
|
||||
tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver"
|
||||
depends on ATH79 && GPIOLIB
|
@ -1,44 +0,0 @@ |
||||
--- a/arch/mips/ath79/mach-ap83.c
|
||||
+++ b/arch/mips/ath79/mach-ap83.c
|
||||
@@ -42,41 +42,8 @@
|
||||
#define AP83_KEYS_POLL_INTERVAL 20 /* msecs */
|
||||
#define AP83_KEYS_DEBOUNCE_INTERVAL (3 * AP83_KEYS_POLL_INTERVAL)
|
||||
|
||||
-static struct mtd_partition ap83_flash_partitions[] = {
|
||||
- {
|
||||
- .name = "u-boot",
|
||||
- .offset = 0,
|
||||
- .size = 0x040000,
|
||||
- .mask_flags = MTD_WRITEABLE,
|
||||
- }, {
|
||||
- .name = "u-boot-env",
|
||||
- .offset = 0x040000,
|
||||
- .size = 0x020000,
|
||||
- .mask_flags = MTD_WRITEABLE,
|
||||
- }, {
|
||||
- .name = "kernel",
|
||||
- .offset = 0x060000,
|
||||
- .size = 0x140000,
|
||||
- }, {
|
||||
- .name = "rootfs",
|
||||
- .offset = 0x1a0000,
|
||||
- .size = 0x650000,
|
||||
- }, {
|
||||
- .name = "art",
|
||||
- .offset = 0x7f0000,
|
||||
- .size = 0x010000,
|
||||
- .mask_flags = MTD_WRITEABLE,
|
||||
- }, {
|
||||
- .name = "firmware",
|
||||
- .offset = 0x060000,
|
||||
- .size = 0x790000,
|
||||
- }
|
||||
-};
|
||||
-
|
||||
static struct physmap_flash_data ap83_flash_data = {
|
||||
.width = 2,
|
||||
- .parts = ap83_flash_partitions,
|
||||
- .nr_parts = ARRAY_SIZE(ap83_flash_partitions),
|
||||
};
|
||||
|
||||
static struct resource ap83_flash_resources[] = {
|
Loading…
Reference in new issue