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@ -50,6 +50,9 @@ static void ar71xx_pci_irq_unmask(unsigned int irq) |
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irq -= AR71XX_PCI_IRQ_BASE; |
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ar71xx_reset_wr(AR71XX_RESET_REG_PCI_INT_ENABLE, |
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ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE) | (1 << irq)); |
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/* flush write */ |
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ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE); |
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} |
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static void ar71xx_pci_irq_mask(unsigned int irq) |
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@ -57,6 +60,9 @@ static void ar71xx_pci_irq_mask(unsigned int irq) |
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irq -= AR71XX_PCI_IRQ_BASE; |
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ar71xx_reset_wr(AR71XX_RESET_REG_PCI_INT_ENABLE, |
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ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE) & ~(1 << irq)); |
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/* flush write */ |
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ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE); |
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} |
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static struct irq_chip ar71xx_pci_irq_chip = { |
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