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@ -95,7 +95,7 @@ static int amazon_pci_config_access(unsigned char access_type, |
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/* Amazon support slot from 0 to 15 */ |
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/* devfn 0 & 0x20 is itself */ |
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if ((bus != 0) || (devfn == 0) || (devfn == 0x20)) |
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if ((bus->number != 0) || (devfn == 0) || (devfn == 0x20)) |
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return 1; |
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pci_addr=AMAZON_PCI_CFG_BASE | |
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@ -124,49 +124,42 @@ static int amazon_pci_config_access(unsigned char access_type, |
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static int amazon_pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) |
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{ |
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u32 data = 0; |
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int ret = PCIBIOS_SUCCESSFUL; |
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if (amazon_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) { |
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data = ~0; |
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ret = -1; |
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} |
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if (amazon_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) |
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return PCIBIOS_DEVICE_NOT_FOUND; |
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switch (size) { |
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case 1: |
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*((u8 *) val) = (data >> ((where & 3) << 3)) & 0xff; |
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break; |
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case 2: |
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*((u16 *) val) = (data >> ((where & 3) << 3)) & 0xffff; |
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break; |
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case 4: |
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*val = data; |
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break; |
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default: |
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return -1; |
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} |
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if (size == 1) |
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*val = (data >> ((where & 3) << 3)) & 0xff; |
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else if (size == 2) |
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*val = (data >> ((where & 3) << 3)) & 0xffff; |
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else |
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*val = data; |
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return ret; |
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return PCIBIOS_SUCCESSFUL; |
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} |
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static int amazon_pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) |
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{ |
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if (size != 4) { |
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u32 data; |
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u32 data = 0; |
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if (size == 4) |
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{ |
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data = val; |
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} else { |
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if (amazon_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) |
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return -1; |
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return PCIBIOS_DEVICE_NOT_FOUND; |
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if (size == 1) |
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val = (data & ~(0xff << ((where & 3) << 3))) | (val << ((where & 3) << 3)); |
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data = (data & ~(0xff << ((where & 3) << 3))) | |
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(val << ((where & 3) << 3)); |
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else if (size == 2) |
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val = (data & ~(0xffff << ((where & 3) << 3))) | (val << ((where & 3) << 3)); |
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else |
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return -1; |
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data = (data & ~(0xffff << ((where & 3) << 3))) | |
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(val << ((where & 3) << 3)); |
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} |
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if (amazon_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val)) |
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return -1; |
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if (amazon_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) |
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return PCIBIOS_DEVICE_NOT_FOUND; |
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return PCIBIOS_SUCCESSFUL; |
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} |
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@ -182,7 +175,7 @@ static struct pci_controller amazon_pci_controller = { |
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.io_resource = &pci_io_resource |
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}; |
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int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
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int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
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{ |
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switch (slot) { |
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case 13: |
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@ -240,7 +233,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev) |
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return 0; |
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} |
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int amazon_pci_init(void) |
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int __init amazon_pci_init(void) |
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{ |
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u32 temp_buffer; |
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@ -286,7 +279,7 @@ int amazon_pci_init(void) |
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//use 8 dw burse length
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AMAZON_PCI_REG32(FPI_BURST_LENGTH) = 0x303; |
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set_io_port_base(ioremap(AMAZON_PCI_IO_BASE, AMAZON_PCI_IO_SIZE)); |
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amazon_pci_controller.io_map_base = (unsigned long)ioremap(AMAZON_PCI_IO_BASE, AMAZON_PCI_IO_SIZE); |
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register_pci_controller(&amazon_pci_controller); |
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return 0; |
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} |
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