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@ -175,27 +175,6 @@ static void __init om2p_lc_setup(void) |
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MIPS_MACHINE(ATH79_MACH_OM2P_LC, "OM2P-LC", "OpenMesh OM2P LC", om2p_lc_setup); |
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static void __init om2p_hs_gmac_setup(void) |
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{ |
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void __iomem *base; |
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u32 t; |
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base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE); |
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t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); |
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t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0 | |
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AR934X_ETH_CFG_GMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE | |
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AR934X_ETH_CFG_SW_PHY_SWAP); |
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t |= AR934X_ETH_CFG_SW_PHY_SWAP; |
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__raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG); |
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t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); |
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iounmap(base); |
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} |
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static void __init om2p_hs_setup(void) |
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{ |
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u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000); |
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@ -222,7 +201,7 @@ static void __init om2p_hs_setup(void) |
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ath79_register_wmac(art, NULL); |
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om2p_hs_gmac_setup(); |
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ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); |
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ath79_register_mdio(1, 0x0); |
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ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); |
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