SVN-Revision: 6142master
parent
297f2368ba
commit
2fb06d46d9
@ -0,0 +1,101 @@ |
||||
--- linux-2.4.34/drivers/ide/pci/aec62xx.c.old 2006-12-23 22:34:20.000000000 +0200
|
||||
+++ linux-2.4.34/drivers/ide/pci/aec62xx.c 2007-01-14 12:06:05.000000000 +0200
|
||||
@@ -3,6 +3,8 @@
|
||||
*
|
||||
* Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
|
||||
*
|
||||
+ * With Broadcom 4780 patches
|
||||
+ *
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
@@ -329,7 +331,11 @@
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct hd_driveid *id = drive->id;
|
||||
|
||||
- if ((id->capability & 1) && drive->autodma) {
|
||||
+#ifndef CONFIG_BCM947XX
|
||||
+ if ((id->capability & 1) && drive->autodma) {
|
||||
+#else
|
||||
+ if (1) {
|
||||
+#endif
|
||||
/* Consult the list of known "bad" drives */
|
||||
if (hwif->ide_dma_bad_drive(drive))
|
||||
goto fast_ata_pio;
|
||||
@@ -414,10 +416,60 @@
|
||||
{
|
||||
int bus_speed = system_bus_clock();
|
||||
|
||||
+#ifndef CONFIG_BCM947XX
|
||||
if (dev->resource[PCI_ROM_RESOURCE].start) {
|
||||
pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
|
||||
printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name, dev->resource[PCI_ROM_RESOURCE].start);
|
||||
}
|
||||
+#else
|
||||
+ if (dev->resource[PCI_ROM_RESOURCE].start) {
|
||||
+ pci_write_config_dword(dev, PCI_ROM_ADDRESS,
|
||||
+ dev->resource[PCI_ROM_RESOURCE].
|
||||
+ start | PCI_ROM_ADDRESS_ENABLE);
|
||||
+ } else {
|
||||
+ pci_write_config_dword(dev, PCI_ROM_ADDRESS,
|
||||
+ dev->resource[PCI_ROM_RESOURCE].
|
||||
+ start);
|
||||
+ }
|
||||
+
|
||||
+ /* Set IDE controller parameters manually - FIXME: replace magic values */
|
||||
+ {
|
||||
+ byte setting;
|
||||
+
|
||||
+ pci_write_config_word(dev, PCI_COMMAND, 0x0007);
|
||||
+ //pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x5A);
|
||||
+ pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x13);
|
||||
+
|
||||
+ pci_write_config_byte(dev, 0x40, 0x31);
|
||||
+ pci_write_config_byte(dev, 0x41, 0x31);
|
||||
+ pci_write_config_byte(dev, 0x42, 0x31);
|
||||
+ pci_write_config_byte(dev, 0x43, 0x31);
|
||||
+ // Set IDE Command Speed
|
||||
+ pci_write_config_byte(dev, 0x48, 0x31);
|
||||
+
|
||||
+ // Disable WriteSubSysID & PIOROM
|
||||
+ pci_read_config_byte(dev, 0x49, &setting);
|
||||
+ setting &= 0x07;
|
||||
+ pci_write_config_byte(dev, 0x49, setting);
|
||||
+
|
||||
+ // Enable PCI burst & INTA & PCI memory read multiple, FIFO threshold=80
|
||||
+ pci_read_config_byte(dev, 0x4A, &setting);
|
||||
+ //setting = (setting & 0xFE) | 0xA8;
|
||||
+ setting = (setting & 0xFE) | 0xD8;
|
||||
+ setting = (setting & 0xF7);
|
||||
+ pci_write_config_byte(dev, 0x4A, setting);
|
||||
+
|
||||
+ //pci_write_config_byte(dev, 0x4B, 0x20);
|
||||
+ pci_write_config_byte(dev, 0x4B, 0x2C);
|
||||
+ //pci_write_config_byte(dev, 0x4B, 0x0C);
|
||||
+
|
||||
+ // Set PreRead count: 512 byte
|
||||
+ pci_write_config_byte(dev, 0x4C, 0);
|
||||
+ pci_write_config_word(dev, 0x4D, 0x0002);
|
||||
+ pci_write_config_byte(dev, 0x54, 0);
|
||||
+ pci_write_config_word(dev, 0x55, 0x0002);
|
||||
+ }
|
||||
+#endif
|
||||
|
||||
#if defined(DISPLAY_AEC62XX_TIMINGS) && defined(CONFIG_PROC_FS)
|
||||
aec_devs[n_aec_devs++] = dev;
|
||||
@@ -500,6 +552,7 @@
|
||||
|
||||
static void __init init_setup_aec6x80 (struct pci_dev *dev, ide_pci_device_t *d)
|
||||
{
|
||||
+#ifndef CONFIG_BCM947XX /* Causes OOPS on BCM4780 */
|
||||
unsigned long bar4reg = pci_resource_start(dev, 4);
|
||||
|
||||
if (inb(bar4reg+2) & 0x10) {
|
||||
@@ -512,6 +565,7 @@
|
||||
strcpy(d->name, "AEC6280R");
|
||||
}
|
||||
|
||||
+#endif
|
||||
ide_setup_pci_device(dev, d);
|
||||
}
|
||||
|
Loading…
Reference in new issue