ar71xx: fix QCA955X_EHCI_SIZE

SVN-Revision: 33360
master
Gabor Juhos 12 years ago
parent 24e24b2d51
commit 2e0e38ad69
  1. 2
      target/linux/ar71xx/patches-3.3/167-MIPS-ath79-add-USB-controller-registration-code-for-.patch
  2. 2
      target/linux/ar71xx/patches-3.3/168-MIPS-ath79-add-WMAC-registration-code-for-the-QCA955.patch
  3. 2
      target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch

@ -86,7 +86,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+#define QCA955X_EHCI0_BASE 0x1b000000 +#define QCA955X_EHCI0_BASE 0x1b000000
+#define QCA955X_EHCI1_BASE 0x1b400000 +#define QCA955X_EHCI1_BASE 0x1b400000
+#define QCA955X_EHCI_SIZE 0x1000 +#define QCA955X_EHCI_SIZE 0x200
+ +
/* /*
* DDR_CTRL block * DDR_CTRL block

@ -67,4 +67,4 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+#define QCA955X_WMAC_SIZE 0x20000 +#define QCA955X_WMAC_SIZE 0x20000
#define QCA955X_EHCI0_BASE 0x1b000000 #define QCA955X_EHCI0_BASE 0x1b000000
#define QCA955X_EHCI1_BASE 0x1b400000 #define QCA955X_EHCI1_BASE 0x1b400000
#define QCA955X_EHCI_SIZE 0x1000 #define QCA955X_EHCI_SIZE 0x200

@ -39,7 +39,7 @@
@@ -112,6 +122,8 @@ @@ -112,6 +122,8 @@
#define QCA955X_EHCI0_BASE 0x1b000000 #define QCA955X_EHCI0_BASE 0x1b000000
#define QCA955X_EHCI1_BASE 0x1b400000 #define QCA955X_EHCI1_BASE 0x1b400000
#define QCA955X_EHCI_SIZE 0x1000 #define QCA955X_EHCI_SIZE 0x200
+#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) +#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)
+#define QCA955X_GMAC_SIZE 0x40 +#define QCA955X_GMAC_SIZE 0x40

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