Hamish Guthrie
14 years ago
parent
8954f94a4b
commit
288331e239
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#
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# Copyright (C) 2011 OpenWrt.org
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#
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# This is free software, licensed under the GNU General Public License v2.
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# See /LICENSE for more information.
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#
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include $(TOPDIR)/rules.mk |
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include $(INCLUDE_DIR)/kernel.mk |
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PKG_NAME:=u-boot
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PKG_VERSION:=2010.12
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PKG_RELEASE:=1
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PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_VERSION)
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PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
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PKG_SOURCE_URL:=ftp://ftp.denx.de/pub/u-boot
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PKG_MD5SUM:=
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PKG_TARGETS:=bin
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include $(INCLUDE_DIR)/package.mk |
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define uboot/Default |
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TITLE:=
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CONFIG:=
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IMAGE:=
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endef |
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define uboot/omap3_overo |
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TITLE:=U-boot for the gumstix board
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endef |
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UBOOTS:=omap3_overo
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define Package/uboot/template |
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define Package/uboot-omap35xx-$(1) |
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SECTION:=boot
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CATEGORY:=Boot Loaders
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DEPENDS:=@TARGET_omap35xx
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TITLE:=$(2)
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URL:=http://www.denx.de/wiki/U-Boot
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VARIANT:=$(1)
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endef |
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endef |
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define BuildUbootPackage |
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$(eval $(uboot/Default))
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$(eval $(uboot/$(1)))
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$(call Package/uboot/template,$(1),$(TITLE))
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endef |
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ifdef BUILD_VARIANT |
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$(eval $(call uboot/$(BUILD_VARIANT))) |
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UBOOT_CONFIG:=$(if $(CONFIG),$(CONFIG),$(BUILD_VARIANT))
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UBOOT_IMAGE:=$(if $(IMAGE),$(IMAGE),openwrt-$(BOARD)-$(BUILD_VARIANT)-u-boot.bin)
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endif |
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define Build/Prepare |
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$(call Build/Prepare/Default)
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$(CP) ./files/* $(PKG_BUILD_DIR)
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find $(PKG_BUILD_DIR) -name .svn | $(XARGS) rm -rf
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endef |
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define Build/Configure |
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$(MAKE) -C $(PKG_BUILD_DIR) \
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$(UBOOT_CONFIG)_config
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endef |
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define Build/Compile |
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$(MAKE) -C $(PKG_BUILD_DIR) \
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CROSS_COMPILE=$(TARGET_CROSS)
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endef |
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define Package/uboot/install/template |
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define Package/uboot-omap35xx-$(1)/install |
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$(INSTALL_DIR) $$(1)
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$(CP) $(PKG_BUILD_DIR)/u-boot.bin $(BIN_DIR)/$(2)
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endef |
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endef |
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$(foreach u,$(UBOOTS), \
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$(eval $(call Package/uboot/install/template,$(u),openwrt-$(BOARD)-$(u)-u-boot.bin)) \
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) |
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$(foreach u,$(UBOOTS), \
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$(eval $(call BuildUbootPackage,$(u))) \
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$(eval $(call BuildPackage,uboot-omap35xx-$(u))) \
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) |
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@ -0,0 +1,316 @@ |
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/*
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* Configuration settings for the Gumstix Overo board. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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/*
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* High Level Configuration Options |
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*/ |
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#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ |
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#define CONFIG_OMAP 1 /* in a TI OMAP core */ |
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#define CONFIG_OMAP34XX 1 /* which is a 34XX */ |
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#define CONFIG_OMAP3430 1 /* which is in a 3430 */ |
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#define CONFIG_OMAP3_OVERO 1 /* working with overo */ |
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#define CONFIG_SDRC /* The chip has SDRC controller */ |
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#include <asm/arch/cpu.h> /* get chip and board defs */ |
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#include <asm/arch/omap3.h> |
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/*
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* Display CPU and Board information |
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*/ |
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#define CONFIG_DISPLAY_CPUINFO 1 |
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#define CONFIG_DISPLAY_BOARDINFO 1 |
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/* Clock Defines */ |
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#define V_OSCK 26000000 /* Clock output from T2 */ |
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#define V_SCLK (V_OSCK >> 1) |
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#undef CONFIG_USE_IRQ /* no support for IRQs */ |
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#define CONFIG_MISC_INIT_R |
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
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#define CONFIG_SETUP_MEMORY_TAGS 1 |
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#define CONFIG_INITRD_TAG 1 |
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#define CONFIG_REVISION_TAG 1 |
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/*
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* Size of malloc() pool |
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*/ |
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
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/* Sector */ |
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) |
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/* initial data */ |
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/*
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* Hardware drivers |
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*/ |
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/*
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* NS16550 Configuration |
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*/ |
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#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
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#define CONFIG_SYS_NS16550 |
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#define CONFIG_SYS_NS16550_SERIAL |
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#define CONFIG_SYS_NS16550_REG_SIZE (-4) |
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#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
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/*
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* select serial console configuration |
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*/ |
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#define CONFIG_CONS_INDEX 3 |
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#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
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#define CONFIG_SERIAL3 3 |
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/* allow to overwrite serial and ethaddr */ |
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#define CONFIG_ENV_OVERWRITE |
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#define CONFIG_BAUDRATE 115200 |
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#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ |
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115200} |
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#define CONFIG_GENERIC_MMC 1 |
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#define CONFIG_MMC 1 |
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#define CONFIG_OMAP_HSMMC 1 |
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#define CONFIG_DOS_PARTITION 1 |
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/* DDR - I use Micron DDR */ |
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#define CONFIG_OMAP3_MICRON_DDR 1 |
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/* commands to include */ |
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#include <config_cmd_default.h> |
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#define CONFIG_CMD_CACHE |
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#define CONFIG_CMD_EXT2 /* EXT2 Support */ |
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#define CONFIG_CMD_FAT /* FAT support */ |
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#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ |
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#define CONFIG_CMD_I2C /* I2C serial bus support */ |
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#define CONFIG_CMD_MMC /* MMC support */ |
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#define CONFIG_CMD_NAND /* NAND support */ |
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#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ |
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#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ |
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#undef CONFIG_CMD_IMI /* iminfo */ |
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#undef CONFIG_CMD_IMLS /* List all found images */ |
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#undef CONFIG_CMD_NFS /* NFS support */ |
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#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ |
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#define CONFIG_SYS_NO_FLASH |
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#define CONFIG_HARD_I2C 1 |
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#define CONFIG_SYS_I2C_SPEED 100000 |
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#define CONFIG_SYS_I2C_SLAVE 1 |
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#define CONFIG_SYS_I2C_BUS 0 |
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#define CONFIG_SYS_I2C_BUS_SELECT 1 |
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#define CONFIG_I2C_MULTI_BUS 1 |
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#define CONFIG_DRIVER_OMAP34XX_I2C 1 |
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/*
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* TWL4030 |
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*/ |
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#define CONFIG_TWL4030_POWER 1 |
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#define CONFIG_TWL4030_LED 1 |
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/*
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* Board NAND Info. |
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*/ |
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#define CONFIG_SYS_NAND_QUIET_TEST 1 |
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#define CONFIG_NAND_OMAP_GPMC |
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#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
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/* to access nand */ |
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#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ |
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/* to access nand */ |
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/* at CS0 */ |
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#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 |
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ |
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/* devices */ |
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#define CONFIG_JFFS2_NAND |
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/* nand device jffs2 lives on */ |
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#define CONFIG_JFFS2_DEV "nand0" |
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/* start of jffs2 partition */ |
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#define CONFIG_JFFS2_PART_OFFSET 0x680000 |
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#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ |
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/* partition */ |
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/* Environment information */ |
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#define CONFIG_BOOTDELAY 5 |
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#define CONFIG_EXTRA_ENV_SETTINGS \ |
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"loadaddr=0x82000000\0" \
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"console=ttyS2,115200n8\0" \
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"mpurate=500\0" \
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"vram=12M\0" \
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"dvimode=1024x768MR-16@60\0" \
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"defaultdisplay=dvi\0" \
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"mmcdev=0\0" \
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"mmcroot=/dev/mmcblk0p2 rw\0" \
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"mmcrootfstype=ext3 rootwait\0" \
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"nandroot='ubi0:rootfs ubi.mtd=4'\0" \
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"nandrootfstype=ubifs\0" \
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"mmcargs=setenv bootargs console=${console} " \
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"mpurate=${mpurate} " \
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"vram=${vram} " \
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"omapfb.mode=dvi:${dvimode} " \
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"omapfb.debug=y " \
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"omapdss.def_disp=${defaultdisplay} " \
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"root=${mmcroot} " \
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"rootfstype=${mmcrootfstype}\0" \
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"nandargs=setenv bootargs console=${console} " \
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"mpurate=${mpurate} " \
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"vram=${vram} " \
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"omapfb.mode=dvi:${dvimode} " \
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"omapfb.debug=y " \
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"omapdss.def_disp=${defaultdisplay} " \
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"root=${nandroot} " \
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"rootfstype=${nandrootfstype}\0" \
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"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source ${loadaddr}\0" \
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"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"bootm ${loadaddr}\0" \
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"nandboot=echo Booting from nand ...; " \
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"run nandargs; " \
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"nand read ${loadaddr} 280000 400000; " \
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"bootm ${loadaddr}\0" \
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#define CONFIG_BOOTCOMMAND \ |
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"if mmc rescan ${mmcdev}; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loaduimage; then " \
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"run mmcboot; " \
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"else run nandboot; " \
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"fi; " \
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"fi; " \
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"else run nandboot; fi" |
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#define CONFIG_AUTO_COMPLETE 1 |
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/*
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* Miscellaneous configurable options |
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*/ |
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#define CONFIG_SYS_LONGHELP /* undef to save memory */ |
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
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#define CONFIG_SYS_PROMPT "Overo # " |
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
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/* Print Buffer Size */ |
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
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sizeof(CONFIG_SYS_PROMPT) + 16) |
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#define CONFIG_SYS_MAXARGS 16 /* max number of command */ |
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/* args */ |
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/* Boot Argument Buffer Size */ |
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
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/* memtest works on */ |
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#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) |
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#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ |
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0x01F00000) /* 31MB */ |
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#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ |
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/* address */ |
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/*
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* OMAP3 has 12 GP timers, they can be driven by the system clock |
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* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
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* This rate is divided by a local divisor. |
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*/ |
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#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 |
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
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#define CONFIG_SYS_HZ 1000 |
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/*-----------------------------------------------------------------------
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* Stack sizes |
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* |
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* The stack sizes are set up in start.S using the settings below |
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*/ |
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#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ |
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#ifdef CONFIG_USE_IRQ |
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#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ |
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#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ |
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#endif |
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/*-----------------------------------------------------------------------
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* Physical Memory Map |
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*/ |
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
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#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ |
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 |
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/* SDRAM Bank Allocation method */ |
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#define SDRC_R_B_C 1 |
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/*-----------------------------------------------------------------------
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* FLASH and environment organization |
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*/ |
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/* **** PISMO SUPPORT *** */ |
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/* Configure the PISMO */ |
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#define PISMO1_NAND_SIZE GPMC_SIZE_128M |
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#define PISMO1_ONEN_SIZE GPMC_SIZE_128M |
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#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ |
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#define CONFIG_SYS_FLASH_BASE boot_flash_base |
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/* Monitor at start of flash */ |
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
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#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP |
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#define CONFIG_ENV_IS_IN_NAND 1 |
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#define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */ |
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#define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */ |
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#define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec |
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#define CONFIG_ENV_OFFSET boot_flash_off |
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#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET |
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#ifndef __ASSEMBLY__ |
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extern unsigned int boot_flash_base; |
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extern volatile unsigned int boot_flash_env_addr; |
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extern unsigned int boot_flash_off; |
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extern unsigned int boot_flash_sec; |
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extern unsigned int boot_flash_type; |
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#endif |
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#if defined(CONFIG_CMD_NET) |
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/*----------------------------------------------------------------------------
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* SMSC9211 Ethernet from SMSC9118 family |
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*---------------------------------------------------------------------------- |
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*/ |
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#define CONFIG_NET_MULTI |
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#define CONFIG_SMC911X 1 |
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#define CONFIG_SMC911X_32_BIT |
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#define CONFIG_SMC911X_BASE 0x2C000000 |
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#endif /* (CONFIG_CMD_NET) */ |
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
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#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
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#define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
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CONFIG_SYS_INIT_RAM_SIZE - \
|
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GENERATED_GBL_DATA_SIZE) |
||||||
|
|
||||||
|
#endif /* __CONFIG_H */ |
||||||
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Reference in new issue