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@ -1,5 +1,5 @@ |
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/*
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* ADM5120 generic GPIO API support |
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* ADM5120 generic GPIO API support via GPIOLIB |
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* |
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* Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org> |
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* |
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@ -25,60 +25,69 @@ |
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#include <asm/mach-adm5120/adm5120_info.h> |
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#include <asm/mach-adm5120/adm5120_switch.h> |
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#define GPIO_READ(r) __raw_readl((r)) |
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#define GPIO_WRITE(v, r) __raw_writel((v), (r)) |
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#define GPIO_REG(r) (void __iomem *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+r) |
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#define GPIO_REG(r) (void __iomem *)(KSEG1ADDR(ADM5120_SWITCH_BASE) + r) |
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struct adm5120_gpio_line { |
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u32 flags; |
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const char *label; |
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int irq; |
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struct gpio1_desc { |
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void __iomem *reg; /* register address */ |
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u8 iv_shift; /* shift amount for input bit */ |
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u8 mode_shift; /* shift amount for mode bits */ |
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}; |
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#define GPIO_FLAG_VALID 0x01 |
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#define GPIO_FLAG_USED 0x02 |
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struct led_desc { |
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void __iomem *reg; /* LED register address */ |
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u8 iv_shift; /* shift amount for input bit */ |
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u8 mode_shift; /* shift amount for mode bits */ |
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}; |
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#define LED_DESC(p, l) { \ |
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.reg = GPIO_REG(SWITCH_REG_PORT0_LED+((p) * 4)), \
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.iv_shift = LED0_IV_SHIFT + (l), \
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.mode_shift = (l) * 4 \
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#define GPIO1_DESC(p, l) { \ |
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.reg = GPIO_REG(SWITCH_REG_PORT0_LED + ((p) * 4)), \
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.iv_shift = LED0_IV_SHIFT + (l), \
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.mode_shift = (l) * 4 \
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} |
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static struct led_desc led_table[15] = { |
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LED_DESC(0, 0), LED_DESC(0, 1), LED_DESC(0, 2), |
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LED_DESC(1, 0), LED_DESC(1, 1), LED_DESC(1, 2), |
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LED_DESC(2, 0), LED_DESC(2, 1), LED_DESC(2, 2), |
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LED_DESC(3, 0), LED_DESC(3, 1), LED_DESC(3, 2), |
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LED_DESC(4, 0), LED_DESC(4, 1), LED_DESC(4, 2) |
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static struct gpio1_desc gpio1_table[15] = { |
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GPIO1_DESC(0, 0), GPIO1_DESC(0, 1), GPIO1_DESC(0, 2), |
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GPIO1_DESC(1, 0), GPIO1_DESC(1, 1), GPIO1_DESC(1, 2), |
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GPIO1_DESC(2, 0), GPIO1_DESC(2, 1), GPIO1_DESC(2, 2), |
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GPIO1_DESC(3, 0), GPIO1_DESC(3, 1), GPIO1_DESC(3, 2), |
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GPIO1_DESC(4, 0), GPIO1_DESC(4, 1), GPIO1_DESC(4, 2) |
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}; |
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static struct adm5120_gpio_line adm5120_gpio_map[ADM5120_GPIO_COUNT]; |
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static u32 gpio_conf2; |
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/*-------------------------------------------------------------------------*/ |
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static inline int gpio_is_invalid(unsigned gpio) |
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int adm5120_gpio_to_irq(unsigned gpio) |
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{ |
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if ((gpio > ADM5120_GPIO_MAX) || |
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(adm5120_gpio_map[gpio].flags & GPIO_FLAG_VALID) == 0) |
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return 1; |
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int ret; |
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return 0; |
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switch (gpio) { |
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case ADM5120_GPIO_PIN2: |
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ret = ADM5120_IRQ_GPIO2; |
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break; |
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case ADM5120_GPIO_PIN4: |
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ret = ADM5120_IRQ_GPIO4; |
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break; |
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default: |
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ret = -EINVAL; |
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break; |
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} |
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return ret; |
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} |
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EXPORT_SYMBOL(adm5120_gpio_to_irq); |
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static inline int gpio_is_used(unsigned gpio) |
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int adm5120_irq_to_gpio(unsigned irq) |
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{ |
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return ((adm5120_gpio_map[gpio].flags & GPIO_FLAG_USED) != 0); |
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} |
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int ret; |
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switch (irq) { |
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case ADM5120_IRQ_GPIO2: |
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ret = ADM5120_GPIO_PIN2; |
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break; |
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case ADM5120_IRQ_GPIO4: |
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ret = ADM5120_GPIO_PIN4; |
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break; |
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default: |
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ret = -EINVAL; |
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break; |
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} |
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/*-------------------------------------------------------------------------*/ |
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return ret; |
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} |
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EXPORT_SYMBOL(adm5120_irq_to_gpio); |
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/*
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* Helpers for GPIO lines in GPIO_CONF0 register |
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@ -88,97 +97,125 @@ static inline int gpio_is_used(unsigned gpio) |
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#define PIN_OE(p) ((1 << GPIO_CONF0_OE_SHIFT) << p) |
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#define PIN_OV(p) ((1 << GPIO_CONF0_OV_SHIFT) << p) |
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static inline int pins_direction_input(unsigned pin) |
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int __adm5120_gpio0_get_value(unsigned offset) |
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{ |
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void __iomem **reg; |
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u32 t; |
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reg = GPIO_REG(SWITCH_REG_GPIO_CONF0); |
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t = GPIO_READ(reg); |
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t &= ~(PIN_OE(pin)); |
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t |= PIN_IM(pin); |
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GPIO_WRITE(t, reg); |
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t = __raw_readl(reg); |
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if ((t & PIN_IM(offset)) != 0) |
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t &= PIN_IV(offset); |
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else |
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t &= PIN_OV(offset); |
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return 0; |
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return (t) ? 1 : 0; |
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} |
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EXPORT_SYMBOL(__adm5120_gpio0_get_value); |
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static inline int pins_direction_output(unsigned pin, int value) |
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void __adm5120_gpio0_set_value(unsigned offset, int value) |
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{ |
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void __iomem **reg; |
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u32 t; |
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reg = GPIO_REG(SWITCH_REG_GPIO_CONF0); |
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t = GPIO_READ(reg); |
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t &= ~(PIN_IM(pin) | PIN_OV(pin)); |
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t |= PIN_OE(pin); |
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t = __raw_readl(reg); |
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if (value == 0) |
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t &= ~(PIN_OV(offset)); |
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else |
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t |= PIN_OV(offset); |
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if (value) |
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t |= PIN_OV(pin); |
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__raw_writel(t, reg); |
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} |
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EXPORT_SYMBOL(__adm5120_gpio0_set_value); |
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GPIO_WRITE(t, reg); |
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static int adm5120_gpio0_get_value(struct gpio_chip *chip, unsigned offset) |
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{ |
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return __adm5120_gpio0_get_value(offset); |
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} |
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return 0; |
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static void adm5120_gpio0_set_value(struct gpio_chip *chip, |
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unsigned offset, int value) |
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{ |
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__adm5120_gpio0_set_value(offset, value); |
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} |
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static inline int pins_get_value(unsigned pin) |
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static int adm5120_gpio0_direction_input(struct gpio_chip *chip, |
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unsigned offset) |
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{ |
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void __iomem **reg; |
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u32 t; |
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reg = GPIO_REG(SWITCH_REG_GPIO_CONF0); |
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t = GPIO_READ(reg); |
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if ((t & PIN_IM(pin)) != 0) |
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t &= PIN_IV(pin); |
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else |
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t &= PIN_OV(pin); |
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t = __raw_readl(reg); |
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t &= ~(PIN_OE(offset)); |
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t |= PIN_IM(offset); |
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__raw_writel(t, reg); |
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return (t) ? 1 : 0; |
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return 0; |
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} |
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static inline void pins_set_value(unsigned pin, int value) |
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static int adm5120_gpio0_direction_output(struct gpio_chip *chip, |
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unsigned offset, int value) |
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{ |
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void __iomem **reg; |
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u32 t; |
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reg = GPIO_REG(SWITCH_REG_GPIO_CONF0); |
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t = GPIO_READ(reg); |
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if (value == 0) |
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t &= ~(PIN_OV(pin)); |
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else |
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t |= PIN_OV(pin); |
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t = __raw_readl(reg); |
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t &= ~(PIN_IM(offset) | PIN_OV(offset)); |
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t |= PIN_OE(offset); |
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if (value) |
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t |= PIN_OV(offset); |
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GPIO_WRITE(t, reg); |
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__raw_writel(t, reg); |
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return 0; |
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} |
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/*
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* Helpers for GPIO lines in PORTx_LED registers |
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*/ |
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static inline int leds_direction_input(unsigned led) |
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static struct gpio_chip adm5120_gpio0_chip = { |
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.label = "adm5120 gpio0", |
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.get = adm5120_gpio0_get_value, |
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.set = adm5120_gpio0_set_value, |
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.direction_input = adm5120_gpio0_direction_input, |
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.direction_output = adm5120_gpio0_direction_output, |
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.base = ADM5120_GPIO_PIN0, |
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.ngpio = ADM5120_GPIO_PIN7 - ADM5120_GPIO_PIN0 + 1, |
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}; |
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int __adm5120_gpio1_get_value(unsigned offset) |
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{ |
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void __iomem **reg; |
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u32 t; |
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u32 t, m; |
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reg = led_table[led].reg; |
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t = GPIO_READ(reg); |
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t &= ~(LED_MODE_MASK << led_table[led].mode_shift); |
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GPIO_WRITE(t, reg); |
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reg = gpio1_table[offset].reg; |
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return 0; |
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t = __raw_readl(reg); |
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m = (t >> gpio1_table[offset].mode_shift) & LED_MODE_MASK; |
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if (m == LED_MODE_INPUT) |
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return (t >> gpio1_table[offset].iv_shift) & 1; |
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if (m == LED_MODE_OUT_LOW) |
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return 0; |
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return 1; |
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} |
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EXPORT_SYMBOL(__adm5120_gpio1_get_value); |
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static inline int leds_direction_output(unsigned led, int value) |
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void __adm5120_gpio1_set_value(unsigned offset, int value) |
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{ |
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void __iomem **reg; |
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u32 t, s; |
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reg = led_table[led].reg; |
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s = led_table[led].mode_shift; |
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reg = gpio1_table[offset].reg; |
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s = gpio1_table[offset].mode_shift; |
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t = GPIO_READ(reg); |
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t = __raw_readl(reg); |
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t &= ~(LED_MODE_MASK << s); |
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switch (value) { |
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@ -202,137 +239,58 @@ static inline int leds_direction_output(unsigned led, int value) |
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break; |
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} |
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GPIO_WRITE(t, reg); |
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return 0; |
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} |
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static inline int leds_get_value(unsigned led) |
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{ |
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void __iomem **reg; |
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u32 t, m; |
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reg = led_table[led].reg; |
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t = GPIO_READ(reg); |
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m = (t >> led_table[led].mode_shift) & LED_MODE_MASK; |
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if (m == LED_MODE_INPUT) |
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return (t >> led_table[led].iv_shift) & 1; |
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if (m == LED_MODE_OUT_LOW) |
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return 0; |
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return 1; |
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} |
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/*-------------------------------------------------------------------------*/ |
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/*
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* Main GPIO support routines |
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*/ |
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int adm5120_gpio_direction_input(unsigned gpio) |
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{ |
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if (gpio_is_invalid(gpio)) |
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return -EINVAL; |
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if (gpio < ADM5120_GPIO_P0L0) |
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return pins_direction_input(gpio); |
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gpio -= ADM5120_GPIO_P0L0; |
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return leds_direction_input(gpio); |
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__raw_writel(t, reg); |
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} |
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EXPORT_SYMBOL(adm5120_gpio_direction_input); |
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EXPORT_SYMBOL(__adm5120_gpio1_set_value); |
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int adm5120_gpio_direction_output(unsigned gpio, int value) |
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static int adm5120_gpio1_get_value(struct gpio_chip *chip, unsigned offset) |
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{ |
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if (gpio_is_invalid(gpio)) |
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return -EINVAL; |
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if (gpio < ADM5120_GPIO_P0L0) |
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return pins_direction_output(gpio, value); |
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gpio -= ADM5120_GPIO_P0L0; |
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return leds_direction_output(gpio, value); |
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return __adm5120_gpio1_get_value(offset); |
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} |
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EXPORT_SYMBOL(adm5120_gpio_direction_output); |
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int adm5120_gpio_get_value(unsigned gpio) |
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static void adm5120_gpio1_set_value(struct gpio_chip *chip, |
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unsigned offset, int value) |
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{ |
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if (gpio < ADM5120_GPIO_P0L0) |
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return pins_get_value(gpio); |
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gpio -= ADM5120_GPIO_P0L0; |
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return leds_get_value(gpio); |
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__adm5120_gpio1_set_value(offset, value); |
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} |
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EXPORT_SYMBOL(adm5120_gpio_get_value); |
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void adm5120_gpio_set_value(unsigned gpio, int value) |
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static int adm5120_gpio1_direction_input(struct gpio_chip *chip, |
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unsigned offset) |
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{ |
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if (gpio < ADM5120_GPIO_P0L0) { |
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pins_set_value(gpio, value); |
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return; |
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} |
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gpio -= ADM5120_GPIO_P0L0; |
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leds_direction_output(gpio, value); |
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} |
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EXPORT_SYMBOL(adm5120_gpio_set_value); |
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int adm5120_gpio_request(unsigned gpio, const char *label) |
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{ |
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if (gpio_is_invalid(gpio)) |
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return -EINVAL; |
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if (gpio_is_used(gpio)) |
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return -EBUSY; |
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void __iomem **reg; |
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u32 t; |
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adm5120_gpio_map[gpio].flags |= GPIO_FLAG_USED; |
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adm5120_gpio_map[gpio].label = label; |
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reg = gpio1_table[offset].reg; |
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t = __raw_readl(reg); |
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t &= ~(LED_MODE_MASK << gpio1_table[offset].mode_shift); |
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__raw_writel(t, reg); |
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return 0; |
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} |
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EXPORT_SYMBOL(adm5120_gpio_request); |
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void adm5120_gpio_free(unsigned gpio) |
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static int adm5120_gpio1_direction_output(struct gpio_chip *chip, |
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unsigned offset, int value) |
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{ |
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if (gpio_is_invalid(gpio)) |
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return; |
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adm5120_gpio_map[gpio].flags &= ~GPIO_FLAG_USED; |
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adm5120_gpio_map[gpio].label = NULL; |
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} |
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EXPORT_SYMBOL(adm5120_gpio_free); |
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int adm5120_gpio_to_irq(unsigned gpio) |
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{ |
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if (gpio > ADM5120_GPIO_MAX) |
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return -EINVAL; |
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return adm5120_gpio_map[gpio].irq; |
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} |
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EXPORT_SYMBOL(adm5120_gpio_to_irq); |
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int adm5120_irq_to_gpio(unsigned irq) |
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|
{ |
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int i; |
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for (i = 0; i < ADM5120_GPIO_COUNT; i++) |
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if (adm5120_gpio_map[i].irq == irq) |
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|
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return i; |
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|
|
return -EINVAL; |
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|
|
__adm5120_gpio1_set_value(offset, value); |
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return 0; |
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|
|
} |
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|
|
EXPORT_SYMBOL(adm5120_irq_to_gpio); |
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/*-------------------------------------------------------------------------*/ |
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|
static struct gpio_chip adm5120_gpio1_chip = { |
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|
|
.label = "adm5120 gpio1", |
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|
|
.get = adm5120_gpio1_get_value, |
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|
.set = adm5120_gpio1_set_value, |
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|
|
.direction_input = adm5120_gpio1_direction_input, |
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|
|
.direction_output = adm5120_gpio1_direction_output, |
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|
|
.base = ADM5120_GPIO_P0L0, |
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|
|
.ngpio = ADM5120_GPIO_P4L2 - ADM5120_GPIO_P0L0 + 1, |
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|
|
}; |
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|
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void __init adm5120_gpio_csx0_enable(void) |
|
|
|
|
{ |
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|
|
|
gpio_conf2 |= GPIO_CONF2_CSX0; |
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|
|
SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2); |
|
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|
|
|
|
|
|
|
adm5120_gpio_map[ADM5120_GPIO_PIN1].flags &= ~GPIO_FLAG_VALID; |
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|
|
adm5120_gpio_map[ADM5120_GPIO_PIN2].irq = ADM5120_IRQ_GPIO2; |
|
|
|
|
gpio_request(ADM5120_GPIO_PIN1, "CSX0"); |
|
|
|
|
} |
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|
|
|
|
|
|
|
void __init adm5120_gpio_csx1_enable(void) |
|
|
|
@ -340,9 +298,7 @@ void __init adm5120_gpio_csx1_enable(void) |
|
|
|
|
gpio_conf2 |= GPIO_CONF2_CSX1; |
|
|
|
|
SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2); |
|
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|
|
|
|
|
|
|
adm5120_gpio_map[ADM5120_GPIO_PIN3].flags &= ~GPIO_FLAG_VALID; |
|
|
|
|
if (adm5120_package_bga()) |
|
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|
|
adm5120_gpio_map[ADM5120_GPIO_PIN4].irq = ADM5120_IRQ_GPIO4; |
|
|
|
|
gpio_request(ADM5120_GPIO_PIN3, "CSX1"); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
void __init adm5120_gpio_ew_enable(void) |
|
|
|
@ -350,23 +306,26 @@ void __init adm5120_gpio_ew_enable(void) |
|
|
|
|
gpio_conf2 |= GPIO_CONF2_EW; |
|
|
|
|
SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2); |
|
|
|
|
|
|
|
|
|
adm5120_gpio_map[ADM5120_GPIO_PIN0].flags &= ~GPIO_FLAG_VALID; |
|
|
|
|
gpio_request(ADM5120_GPIO_PIN0, "EW"); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
void __init adm5120_gpio_init(void) |
|
|
|
|
{ |
|
|
|
|
int i; |
|
|
|
|
int err; |
|
|
|
|
|
|
|
|
|
gpio_conf2 = 0; |
|
|
|
|
SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2); |
|
|
|
|
|
|
|
|
|
for (i = 0; i < ADM5120_GPIO_COUNT; i++) |
|
|
|
|
adm5120_gpio_map[i].flags = GPIO_FLAG_VALID; |
|
|
|
|
|
|
|
|
|
if (adm5120_package_pqfp()) { |
|
|
|
|
adm5120_gpio_map[ADM5120_GPIO_PIN4].flags &= ~GPIO_FLAG_VALID; |
|
|
|
|
adm5120_gpio_map[ADM5120_GPIO_PIN5].flags &= ~GPIO_FLAG_VALID; |
|
|
|
|
adm5120_gpio_map[ADM5120_GPIO_PIN6].flags &= ~GPIO_FLAG_VALID; |
|
|
|
|
adm5120_gpio_map[ADM5120_GPIO_PIN7].flags &= ~GPIO_FLAG_VALID; |
|
|
|
|
gpiochip_reserve(ADM5120_GPIO_PIN4, 4); |
|
|
|
|
adm5120_gpio0_chip.ngpio = 4; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
err = gpiochip_add(&adm5120_gpio0_chip); |
|
|
|
|
if (err) |
|
|
|
|
panic("cannot add ADM5120 GPIO0 chip, error=%d", err); |
|
|
|
|
|
|
|
|
|
err = gpiochip_add(&adm5120_gpio1_chip); |
|
|
|
|
if (err) |
|
|
|
|
panic("cannot add ADM5120 GPIO1 chip, error=%d", err); |
|
|
|
|
|
|
|
|
|
} |
|
|
|
|