parent
917d883e0c
commit
16006896b4
@ -0,0 +1,20 @@ |
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--- a/arch/mips/rb532/prom.c
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+++ b/arch/mips/rb532/prom.c
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@@ -67,6 +67,7 @@ static inline unsigned long tag2ul(char
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return simple_strtoul(num, 0, 10);
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}
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+extern char __image_cmdline[];
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void __init prom_setup_cmdline(void)
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{
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char cmd_line[CL_SIZE];
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@@ -109,6 +110,9 @@ void __init prom_setup_cmdline(void)
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}
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*(cp++) = ' ';
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+ strcpy(cp,(__image_cmdline));
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+ cp += strlen(__image_cmdline);
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+
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i = strlen(arcs_cmdline);
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if (i > 0) {
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*(cp++) = ' ';
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@ -0,0 +1,48 @@ |
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--- a/arch/mips/rb532/devices.c
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+++ b/arch/mips/rb532/devices.c
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@@ -140,6 +140,19 @@ static struct platform_device cf_slot0 =
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};
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/* Resources and device for NAND */
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+
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+/*
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+ * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
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+ * will not be able to find the kernel that we load. So set the oobinfo
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+ * when creating the partitions
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+ */
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+static struct nand_ecclayout rb532_nand_ecclayout = {
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+ .eccbytes = 6,
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+ .eccpos = { 8, 9, 10, 13, 14, 15 },
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+ .oobavail = 9,
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+ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
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+};
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+
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static int rb532_dev_ready(struct mtd_info *mtd)
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{
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return gpio_get_value(GPIO_RDY);
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@@ -281,6 +294,16 @@ static void __init parse_mac_addr(char *
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/* NAND definitions */
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#define NAND_CHIP_DELAY 25
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+static int rb532_nand_fixup(struct mtd_info *mtd)
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+{
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+ struct nand_chip *chip = mtd->priv;
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+
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+ if (mtd->writesize == 512)
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+ chip->ecc.layout = &rb532_nand_ecclayout;
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+
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+ return 0;
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+}
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+
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static void __init rb532_nand_setup(void)
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{
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switch (mips_machtype) {
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@@ -300,6 +323,8 @@ static void __init rb532_nand_setup(void
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rb532_nand_data.chip.partitions = rb532_partition_info;
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rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY;
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rb532_nand_data.chip.options = NAND_NO_AUTOINCR;
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+
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+ rb532_nand_data.chip.chip_fixup = &rb532_nand_fixup;
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}
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