The deleted patches are already integrated in the upstream U-Boot version. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>master
parent
ea9fab904b
commit
1422d4435b
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,38 +0,0 @@ |
||||
From 730d2f3a41c5ccae71b5008fffdf697d143be68c Mon Sep 17 00:00:00 2001
|
||||
From: Hans de Goede <hdegoede@redhat.com>
|
||||
Date: Wed, 16 Mar 2016 20:44:51 +0100
|
||||
Subject: [PATCH] sunxi: Fix clock_twi_onoff for sun6i
|
||||
|
||||
The clock_sun6i.c implementation was not deasserting the reset for
|
||||
the regular i2c controllers, this commit fixes this.
|
||||
|
||||
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
||||
Acked-by: Ian Campbell <ijc@hellion.org.uk>
|
||||
---
|
||||
arch/arm/cpu/armv7/sunxi/clock_sun6i.c | 11 ++++++++---
|
||||
1 file changed, 8 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
|
||||
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
|
||||
@@ -100,13 +100,18 @@ int clock_twi_onoff(int port, int state)
|
||||
return 0;
|
||||
}
|
||||
|
||||
- /* set the apb clock gate for twi */
|
||||
- if (state)
|
||||
+ /* set the apb clock gate and reset for twi */
|
||||
+ if (state) {
|
||||
setbits_le32(&ccm->apb2_gate,
|
||||
CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
|
||||
- else
|
||||
+ setbits_le32(&ccm->apb2_reset_cfg,
|
||||
+ 1 << (APB2_RESET_TWI_SHIFT + port));
|
||||
+ } else {
|
||||
+ clrbits_le32(&ccm->apb2_reset_cfg,
|
||||
+ 1 << (APB2_RESET_TWI_SHIFT + port));
|
||||
clrbits_le32(&ccm->apb2_gate,
|
||||
CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
|
||||
+ }
|
||||
|
||||
return 0;
|
||||
}
|
@ -1,24 +0,0 @@ |
||||
From 1eae8f66ff749409eb96e2f3f3387c56232d0b8a Mon Sep 17 00:00:00 2001
|
||||
From: Hans de Goede <hdegoede@redhat.com>
|
||||
Date: Wed, 16 Mar 2016 13:46:22 +0100
|
||||
Subject: [PATCH] sunxi: Enable realtek phy support
|
||||
|
||||
Enable building of drivers/net/phy/realtek.c so that realtek phys
|
||||
get properly initialized.
|
||||
|
||||
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
||||
Acked-by: Ian Campbell <ijc@hellion.org.uk>
|
||||
---
|
||||
include/configs/sunxi-common.h | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
--- a/include/configs/sunxi-common.h
|
||||
+++ b/include/configs/sunxi-common.h
|
||||
@@ -314,6 +314,7 @@ extern int soft_i2c_gpio_scl;
|
||||
#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
|
||||
#define CONFIG_PHY_ADDR 1
|
||||
#define CONFIG_MII /* MII PHY management */
|
||||
+#define CONFIG_PHY_REALTEK
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_EHCI_HCD
|
@ -1,127 +0,0 @@ |
||||
From fc8991c61c393ce6a9d3dfc97cb56dbbd9e8cbba Mon Sep 17 00:00:00 2001
|
||||
From: Hans de Goede <hdegoede@redhat.com>
|
||||
Date: Thu, 17 Mar 2016 13:53:03 +0100
|
||||
Subject: [PATCH] sunxi: Fix gmac not working due to cpu_eth_init no longer
|
||||
being called
|
||||
|
||||
cpu_eth_init is no longer called for dm enabled eth drivers, this
|
||||
was causing the sunxi gmac eth controller to no longer work in u-boot.
|
||||
|
||||
This commit fixes this by calling the clock, reset and pinmux setup
|
||||
function from s_init() and enabling the phy power pin (if any) from
|
||||
board_init().
|
||||
|
||||
The enabling of phy power cannot be done from s_init because it uses dm
|
||||
and dm is not ready yet at this point.
|
||||
|
||||
Note that the mdelay is dropped as the phy gets enabled much earlier
|
||||
now, so it is no longer needed.
|
||||
|
||||
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
||||
Acked-by: Ian Campbell <ijc@hellion.org.uk>
|
||||
Tested-by: Karsten Merker <merker@debian.org>
|
||||
Tested-by: Michael Haas <haas@computerlinguist.org>
|
||||
---
|
||||
arch/arm/cpu/armv7/sunxi/board.c | 28 +---------------------------
|
||||
arch/arm/include/asm/arch-sunxi/sys_proto.h | 6 +++++-
|
||||
board/sunxi/board.c | 5 +++++
|
||||
board/sunxi/gmac.c | 14 +-------------
|
||||
4 files changed, 12 insertions(+), 41 deletions(-)
|
||||
|
||||
--- a/arch/arm/cpu/armv7/sunxi/board.c
|
||||
+++ b/arch/arm/cpu/armv7/sunxi/board.c
|
||||
@@ -136,6 +136,7 @@ void s_init(void)
|
||||
timer_init();
|
||||
gpio_init();
|
||||
i2c_init_board();
|
||||
+ eth_init_board();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
@@ -243,30 +244,3 @@ void enable_caches(void)
|
||||
dcache_enable();
|
||||
}
|
||||
#endif
|
||||
-
|
||||
-#ifdef CONFIG_CMD_NET
|
||||
-/*
|
||||
- * Initializes on-chip ethernet controllers.
|
||||
- * to override, implement board_eth_init()
|
||||
- */
|
||||
-int cpu_eth_init(bd_t *bis)
|
||||
-{
|
||||
- __maybe_unused int rc;
|
||||
-
|
||||
-#ifdef CONFIG_MACPWR
|
||||
- gpio_request(CONFIG_MACPWR, "macpwr");
|
||||
- gpio_direction_output(CONFIG_MACPWR, 1);
|
||||
- mdelay(200);
|
||||
-#endif
|
||||
-
|
||||
-#ifdef CONFIG_SUNXI_GMAC
|
||||
- rc = sunxi_gmac_initialize(bis);
|
||||
- if (rc < 0) {
|
||||
- printf("sunxi: failed to initialize gmac\n");
|
||||
- return rc;
|
||||
- }
|
||||
-#endif
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-#endif
|
||||
--- a/arch/arm/include/asm/arch-sunxi/sys_proto.h
|
||||
+++ b/arch/arm/include/asm/arch-sunxi/sys_proto.h
|
||||
@@ -24,6 +24,10 @@ void sdelay(unsigned long);
|
||||
void return_to_fel(uint32_t lr, uint32_t sp);
|
||||
|
||||
/* Board / SoC level designware gmac init */
|
||||
-int sunxi_gmac_initialize(bd_t *bis);
|
||||
+#if !defined CONFIG_SPL_BUILD && defined CONFIG_SUNXI_GMAC
|
||||
+void eth_init_board(void);
|
||||
+#else
|
||||
+static inline void eth_init_board(void) {}
|
||||
+#endif
|
||||
|
||||
#endif
|
||||
--- a/board/sunxi/board.c
|
||||
+++ b/board/sunxi/board.c
|
||||
@@ -90,6 +90,11 @@ int board_init(void)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
+#ifdef CONFIG_MACPWR
|
||||
+ gpio_request(CONFIG_MACPWR, "macpwr");
|
||||
+ gpio_direction_output(CONFIG_MACPWR, 1);
|
||||
+#endif
|
||||
+
|
||||
/* Uses dm gpio code so do this here and not in i2c_init_board() */
|
||||
return soft_i2c_board_init();
|
||||
}
|
||||
--- a/board/sunxi/gmac.c
|
||||
+++ b/board/sunxi/gmac.c
|
||||
@@ -6,7 +6,7 @@
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
-int sunxi_gmac_initialize(bd_t *bis)
|
||||
+void eth_init_board(void)
|
||||
{
|
||||
int pin;
|
||||
struct sunxi_ccm_reg *const ccm =
|
||||
@@ -79,16 +79,4 @@ int sunxi_gmac_initialize(bd_t *bis)
|
||||
for (pin = SUNXI_GPA(26); pin <= SUNXI_GPA(27); pin++)
|
||||
sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
|
||||
#endif
|
||||
-
|
||||
-#ifdef CONFIG_DM_ETH
|
||||
- return 0;
|
||||
-#else
|
||||
-# ifdef CONFIG_RGMII
|
||||
- return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII);
|
||||
-# elif defined CONFIG_GMII
|
||||
- return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_GMII);
|
||||
-# else
|
||||
- return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_MII);
|
||||
-# endif
|
||||
-#endif
|
||||
}
|
@ -1,78 +0,0 @@ |
||||
From 948603d4d637a0e04a3214253b911cfc4ed11220 Mon Sep 17 00:00:00 2001
|
||||
From: Hans de Goede <hdegoede@redhat.com>
|
||||
Date: Mon, 21 Mar 2016 14:44:35 +0100
|
||||
Subject: [PATCH] sunxi: Fix 2nd usb controller on sun4i/sun7i no longer
|
||||
working
|
||||
|
||||
The 2nd usb controller on sun4i/sun7i has its base address 0x8000
|
||||
bytes from the 1st one, rather then 0x1000. Also the ahb clk gates
|
||||
are interleaved with the ohci clk-gates introducing a hole between
|
||||
the clks for usb1 and usb2.
|
||||
|
||||
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
||||
Acked-by: Ian Campbell <ijc@hellion.org.uk>
|
||||
---
|
||||
drivers/usb/host/ehci-sunxi.c | 13 +++++++++++--
|
||||
drivers/usb/host/ohci-sunxi.c | 15 ++++++++++++---
|
||||
2 files changed, 23 insertions(+), 5 deletions(-)
|
||||
|
||||
--- a/drivers/usb/host/ehci-sunxi.c
|
||||
+++ b/drivers/usb/host/ehci-sunxi.c
|
||||
@@ -17,6 +17,14 @@
|
||||
#include <dm.h>
|
||||
#include "ehci.h"
|
||||
|
||||
+#ifdef CONFIG_SUNXI_GEN_SUN4I
|
||||
+#define BASE_DIST 0x8000
|
||||
+#define AHB_CLK_DIST 2
|
||||
+#else
|
||||
+#define BASE_DIST 0x1000
|
||||
+#define AHB_CLK_DIST 1
|
||||
+#endif
|
||||
+
|
||||
struct ehci_sunxi_priv {
|
||||
struct ehci_ctrl ehci;
|
||||
int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
|
||||
@@ -39,8 +47,9 @@ static int ehci_usb_probe(struct udevice
|
||||
#ifdef CONFIG_MACH_SUN8I_H3
|
||||
priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_OHCI0;
|
||||
#endif
|
||||
- priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / 0x1000 + 1;
|
||||
- priv->ahb_gate_mask <<= priv->phy_index - 1;
|
||||
+ priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / BASE_DIST;
|
||||
+ priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
|
||||
+ priv->phy_index++; /* Non otg phys start at 1 */
|
||||
|
||||
setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
|
||||
#ifdef CONFIG_SUNXI_GEN_SUN6I
|
||||
--- a/drivers/usb/host/ohci-sunxi.c
|
||||
+++ b/drivers/usb/host/ohci-sunxi.c
|
||||
@@ -17,6 +17,14 @@
|
||||
#include <usb.h>
|
||||
#include "ohci.h"
|
||||
|
||||
+#ifdef CONFIG_SUNXI_GEN_SUN4I
|
||||
+#define BASE_DIST 0x8000
|
||||
+#define AHB_CLK_DIST 2
|
||||
+#else
|
||||
+#define BASE_DIST 0x1000
|
||||
+#define AHB_CLK_DIST 1
|
||||
+#endif
|
||||
+
|
||||
struct ohci_sunxi_priv {
|
||||
ohci_t ohci;
|
||||
int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
|
||||
@@ -42,9 +50,10 @@ static int ohci_usb_probe(struct udevice
|
||||
priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_EHCI0;
|
||||
#endif
|
||||
priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
|
||||
- priv->phy_index = ((u32)regs - (SUNXI_USB1_BASE + 0x400)) / 0x1000 + 1;
|
||||
- priv->ahb_gate_mask <<= priv->phy_index - 1;
|
||||
- priv->usb_gate_mask <<= priv->phy_index - 1;
|
||||
+ priv->phy_index = ((u32)regs - (SUNXI_USB1_BASE + 0x400)) / BASE_DIST;
|
||||
+ priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
|
||||
+ priv->usb_gate_mask <<= priv->phy_index;
|
||||
+ priv->phy_index++; /* Non otg phys start at 1 */
|
||||
|
||||
setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
|
||||
setbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask);
|
@ -1,31 +0,0 @@ |
||||
From 8f10b5c65611e6c15a113bf63289b6696452f90d Mon Sep 17 00:00:00 2001
|
||||
From: Hans de Goede <hdegoede@redhat.com>
|
||||
Date: Sun, 20 Mar 2016 14:17:10 +0100
|
||||
Subject: [PATCH] spl: Print from which mmc slot spl is trying to boot
|
||||
|
||||
On some sunxi boards (and presumably also non sunxi boards) u-boot can
|
||||
be either loaded from a sdcard in a micro-sd slot, or from eMMC.
|
||||
|
||||
Print which MMC spl tries to boot from, to help debugging.
|
||||
|
||||
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
||||
Reviewed-by: Tom Rini <trini@konsulko.com>
|
||||
---
|
||||
common/spl/spl.c | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/common/spl/spl.c
|
||||
+++ b/common/spl/spl.c
|
||||
@@ -210,9 +210,9 @@ struct boot_device_name boot_name_table[
|
||||
{ BOOT_DEVICE_RAM, "RAM" },
|
||||
#endif
|
||||
#ifdef CONFIG_SPL_MMC_SUPPORT
|
||||
- { BOOT_DEVICE_MMC1, "MMC" },
|
||||
- { BOOT_DEVICE_MMC2, "MMC" },
|
||||
- { BOOT_DEVICE_MMC2_2, "MMC" },
|
||||
+ { BOOT_DEVICE_MMC1, "MMC1" },
|
||||
+ { BOOT_DEVICE_MMC2, "MMC2" },
|
||||
+ { BOOT_DEVICE_MMC2_2, "MMC2_2" },
|
||||
#endif
|
||||
#ifdef CONFIG_SPL_NAND_SUPPORT
|
||||
{ BOOT_DEVICE_NAND, "NAND" },
|
@ -1,39 +0,0 @@ |
||||
From 60fa63012fcdc3c4ec1497bf5e358f0a90b40949 Mon Sep 17 00:00:00 2001
|
||||
From: Hans de Goede <hdegoede@redhat.com>
|
||||
Date: Fri, 18 Mar 2016 08:42:01 +0100
|
||||
Subject: [PATCH] sunxi: Add support for USB vbus pin for USB3
|
||||
|
||||
The H3 has USB0 - USB3, add support for having a USB vbus pin for USB3.
|
||||
|
||||
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
||||
Acked-by: Ian Campbell <ijc@hellion.org.uk>
|
||||
---
|
||||
arch/arm/cpu/armv7/sunxi/usb_phy.c | 1 +
|
||||
board/sunxi/Kconfig | 6 ++++++
|
||||
2 files changed, 7 insertions(+)
|
||||
|
||||
--- a/arch/arm/cpu/armv7/sunxi/usb_phy.c
|
||||
+++ b/arch/arm/cpu/armv7/sunxi/usb_phy.c
|
||||
@@ -76,6 +76,7 @@ static int get_vbus_gpio(int index)
|
||||
case 0: return sunxi_name_to_gpio(CONFIG_USB0_VBUS_PIN);
|
||||
case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN);
|
||||
case 2: return sunxi_name_to_gpio(CONFIG_USB2_VBUS_PIN);
|
||||
+ case 3: return sunxi_name_to_gpio(CONFIG_USB3_VBUS_PIN);
|
||||
}
|
||||
return -EINVAL;
|
||||
}
|
||||
--- a/board/sunxi/Kconfig
|
||||
+++ b/board/sunxi/Kconfig
|
||||
@@ -341,6 +341,12 @@ config USB2_VBUS_PIN
|
||||
---help---
|
||||
See USB1_VBUS_PIN help text.
|
||||
|
||||
+config USB3_VBUS_PIN
|
||||
+ string "Vbus enable pin for usb3 (ehci2)"
|
||||
+ default ""
|
||||
+ ---help---
|
||||
+ See USB1_VBUS_PIN help text.
|
||||
+
|
||||
config I2C0_ENABLE
|
||||
bool "Enable I2C/TWI controller 0"
|
||||
default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
|
@ -1,31 +0,0 @@ |
||||
From ce0d0926758f631fdd655d438acd32d5935d43a4 Mon Sep 17 00:00:00 2001
|
||||
From: Hans de Goede <hdegoede@redhat.com>
|
||||
Date: Fri, 18 Mar 2016 08:45:21 +0100
|
||||
Subject: [PATCH] sunxi: Specify USB vbus pins for orangepi boards
|
||||
|
||||
This fixes the USB ports not working on the orangepi_plus and stops us
|
||||
from messing with gpio-s which we should not touch on the orangepi_pc.
|
||||
|
||||
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
||||
Acked-by: Ian Campbell <ijc@hellion.org.uk>
|
||||
---
|
||||
configs/orangepi_pc_defconfig | 3 +++
|
||||
configs/orangepi_plus_defconfig | 1 +
|
||||
2 files changed, 4 insertions(+)
|
||||
|
||||
--- a/configs/orangepi_pc_defconfig
|
||||
+++ b/configs/orangepi_pc_defconfig
|
||||
@@ -14,3 +14,6 @@ CONFIG_SPL=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_SY8106A_POWER=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
+CONFIG_USB1_VBUS_PIN=""
|
||||
+CONFIG_USB2_VBUS_PIN=""
|
||||
+CONFIG_USB3_VBUS_PIN=""
|
||||
--- a/configs/orangepi_plus_defconfig
|
||||
+++ b/configs/orangepi_plus_defconfig
|
||||
@@ -14,3 +14,4 @@ CONFIG_SPL=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_SY8106A_POWER=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
+CONFIG_USB1_VBUS_PIN="PG13"
|
@ -1,33 +0,0 @@ |
||||
From 70fe24ed93fa90eb407d18a5fc9d9ad85ac9184c Mon Sep 17 00:00:00 2001
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
Date: Wed, 27 Jan 2016 16:34:43 +0800
|
||||
Subject: [PATCH] sunxi: Support SID e-fuses on A83T and H3
|
||||
|
||||
On the A83T and H3, the SID block is at a different address.
|
||||
Furthurmore, the e-fuses are at an offset of 0x200 within the
|
||||
hardware's address space.
|
||||
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
Acked-by: Hans de Goede <hdegoede@redhat.com>
|
||||
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
||||
---
|
||||
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++++++
|
||||
1 file changed, 7 insertions(+)
|
||||
|
||||
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
|
||||
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
|
||||
@@ -82,7 +82,14 @@
|
||||
#define SUNXI_AD_DA_BASE 0x01c22c00
|
||||
#define SUNXI_KEYPAD_BASE 0x01c23000
|
||||
#define SUNXI_TZPC_BASE 0x01c23400
|
||||
+
|
||||
+#if defined(CONFIG_MACH_SUN8I_A83T) || defined(CONFIG_MACH_SUN8I_H3)
|
||||
+/* SID address space starts at 0x01c1400, but e-fuse is at offset 0x200 */
|
||||
+#define SUNXI_SID_BASE 0x01c14200
|
||||
+#else
|
||||
#define SUNXI_SID_BASE 0x01c23800
|
||||
+#endif
|
||||
+
|
||||
#define SUNXI_SJTAG_BASE 0x01c23c00
|
||||
|
||||
#define SUNXI_TP_BASE 0x01c25000
|
@ -1,23 +0,0 @@ |
||||
From 2af25b747340c6c8f6a6b9e27632db577bf4da52 Mon Sep 17 00:00:00 2001
|
||||
From: Simon Glass <sjg@chromium.org>
|
||||
Date: Mon, 22 Feb 2016 22:55:46 -0700
|
||||
Subject: [PATCH] sunxi: Display the board model on start-up
|
||||
|
||||
It is useful to know which sunxi board you are booting. Display this on
|
||||
start-up to avoid confusion.
|
||||
|
||||
Signed-off-by: Simon Glass <sjg@chromium.org>
|
||||
---
|
||||
include/configs/sunxi-common.h | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
--- a/include/configs/sunxi-common.h
|
||||
+++ b/include/configs/sunxi-common.h
|
||||
@@ -174,6 +174,7 @@
|
||||
|
||||
#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
|
||||
#define CONFIG_IDENT_STRING " Allwinner Technology"
|
||||
+#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
|
||||
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
|
Loading…
Reference in new issue